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LNBH26 Datasheet(PDF) 21 Page - STMicroelectronics

Part # LNBH26
Description  Dual LNBS supply and control IC with step-up and I짼C interface
PDF  38 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

LNBH26 Datasheet(HTML) 21 Page - STMicroelectronics

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LNBH26
I²C interface protocol
Doc ID 022771 Rev 1
21/38
7.2
Read mode transmission
In read mode the bytes sequence must be as follows:
●
a start condition (S)
●
a chip address byte with the LSB bit R/W=0
●
the register address byte of the internal first register to be accessed
●
a stop condition (P)
●
a new master transmission with the chip address byte and the LSB bit R/W=1
●
after the acknowledge the LNBH26 starts to send the addressed register content. As
long as the master keeps the acknowledge LOW, the LNBH26 transmits the next
address register byte content.
●
the transmission is terminated when the master sets the acknowledge HIGH with a
following stop bit.
Figure 12.
Example of reading procedure starting with first status address 0X0 (b)
ACK = Acknowledge
S = Start
P = Stop
R/W = 1/0, Read/Write bit
X = 0/1, set the values to select the CHIP address (see
Table 16 for pin selection) and to
select the REGISTER address (see
Table 7 to Table 12).
b.
The reading procedure can start from any register address (Status 1, 2 or Data1..4) by simply setting the X
values in the register address byte (after the first chip address in the above figure). It can be also stopped by
the master by sending a stop condition after any acknowledge bit.
AM10480v1
S
00
0
1
00
X
00000
X X X
P
MSB
LSB
STATUS 2
Add=0x1
MSB
LSB
STATUS 1
Add=0x0
S0
0
0
1
0
0
X
MSB
LSB
CHIP ADDRESS
MSB
LSB
REGISTER ADDRESS
MSB
LSB
CHIP ADDRESS
P
MSB
LSB
MSB
LSB
MSB
LSB
MSB
LSB
DATA 1
Add=0x2
DATA 2
Add=0x3
DATA 3
Add=0x4
DATA 4
Add=0x5



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