IMX51 datasheet(21/202 Pages) FREESCALE

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Electrical Characteristics

i.MX51 Applications Processors for Consumer and Industrial Products, Rev. 6

Freescale Semiconductor

4.1.1

Supply Current

Table 15 shows the fuse supply current.

Table 16 shows the current core consumption (not including I/O) of the i.MX51.

4 In Read mode, Freescale recommends VDD_FUSE be floated or grounded. Tying VDD_FUSE to a positive supply

(3.0 V–3.3 V) increases the possibility of inadvertently blowing fuses and is not recommended.

5 The NAND Flash supplies are composed of three groups: A, B, and C. Each group can be powered with a different supply

voltage. For example, NVCC_NANDF_A = 1.8 V, NVCC_NANDF_B = 3.0 V, NVCC_NANDF_C = 2.7 V.

6 The analog supplies should be isolated in the application design. Use of series inductors is recommended.

7 Operation of the HS-I2C and I2C is not guaranteed when operated between the supply voltages of 1.95 to 2.7 V.

Table 14. Interface Frequency

Parameter Description

Symbol

Min

Max

Unit

JTAG: TCK Operating Frequency

ftck

See Table 99, "JTAG Timing," on page 132

MHz

CKIL: Operating Frequency

fckil

See Table 74, "FPM Specifications," on page 82

kHz

CKIH: Operating Frequency

fckih

See Table 47, "CAMP Electrical Parameters (CKIH1,

CKIH2)," on page 48

MHz

XTAL Oscillator

fxtal

MHz

Table 15. Fuse Supply Current1

1 The read current of approximately 5 mA is derived from the DDR supply (NVCC_EMI_DRAM).

Description

Symbol

Min

Typ

Max

Unit

eFuse Program Current.2

Current required to program one eFuse bit: The associated

VDD_FUSE supply per Table 13.

2 The current I

program is only required during program time.

Iprogram

—

120

Table 16. i.MX51 Stop Mode Current and Power Consumption

Mode

Condition

Supply

Nominal

Unit

Stop Mode

• External reference clocks

gated

• Power gating for ARM and

processing units

• Stop mode voltage

VDDGP = 0.85 V, VCC = 0.95 V, VDDA = 0.95 V

ARM CORE in SRPG mode

L1 and L2 caches power gated

IPU in S&RPG mode

VPU and GPU in PG mode

All PLLs off, all CCM-generated clocks off

CKIL input on with 32 kHz signal present

All modules disabled

USBPHY PLL off

External (MHz) crystal and on-chip oscillator

powered down (SBYOS bit asserted)

No external resistive loads that cause current flow

Standby voltage allowed (VSTBY bit is asserted)

TA = 25

°C

VDDGP

0.18

VCC

0.35

VDDA

0.15

NVCC_OSC

0.012

Total

0.66

IMX51 Datasheet(PDF) 21 Page - Freescale Semiconductor, Inc

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