APW7290 datasheet(9/18 Pages) ANPEC

9 / 18 page

Rev. A.2 - Jun., 2013

www.anpec.com.tw

APW7290

Function Description

Main Control Loop

The APW7290 is a constant frequency, synchronous rec-

tifier and current-mode switching regulator. In normal

operation, the internal P-channel power MOSFET is

turned on each cycle. The peak inductor current at which

ICMP turn off the P-FET is controlled by the voltage on the

COMP node, which is the output of the error amplifier

(EAMP). An external resistive divider connected between

VOUT and ground allows the EAMP to receive an output

feedback voltage VFB at FB pin. When the load current

increases, it causes a slightly decrease in VFB relative to

the 0.6V reference, which in turn causes the COMP volt-

age to increase until the average inductor current matches

the new load current.

Under-Voltage Lockout

An under-voltage lockout function prevents the device from

operating if the input voltage on VIN is lower than approxi-

mately 3V (Typ.). The device automatically enters the shut-

down mode if the voltage on VIN drops below approxi-

mately 3V. This under-voltage lockout function is imple-

mented in order to prevent the malfunctioning of the

converter.

Soft-Start

The APW7290 has a built-in soft-start to control the out-

put voltage rise during start-up. During soft-start, an in-

ternal ramp voltage, connected to the one of the positive

inputs of the error amplifier, raises up to replace the ref-

erence voltage (0.6V typical) until the ramp voltage

reaches the reference voltage. Then the voltage on FB

regulated at reference voltage.

Enable/Shutdown

Driving RUN to ground places the APW7290 in shutdown

mode. When in shutdown, the internal power MOSFETs

turn off, all internal circuitry shuts down and the quies-

cent supply current reduces to 0.5

µA maximum.

Pulse Frequency Modulation Mode (PFM)

The APW7290 is a fixed frequency, peak current mode

PWM step-down converter. At light loads, the APW7290

will automatically enter in pulse frequency mode opera-

tion to reduce the dominant switching losses. In PFM

operation, the inductor current may reach zero or reverse

on each pulse. A zero current comparator turn off the N-

FET, forcing DCM operation at light load. These controls

get very low quiescent current, help to maintain high effi-

ciency over the complete load range.

Slope Compensation and Inductor Peak Current

Slope compensation provides stability in constant fre-

quency architectures by preventing sub-harmonic oscil-

lations at high duty cycles. It is accomplished internally

by adding a compensating ramp to the inductor current

signal at duty cycles in excess of 40%. Normally, the re-

sult is in a reduction of maximum inductor peak current

for duty cycles > 40%. However, the APW7290 uses a

special scheme that counteracts this compensating

ramp, which allows the maximum inductor peak current

to remain unaffected throughout all duty cycles.

Adaptive Shoot-Through Protection

The gate driver incorporates adaptive shoot-through pro-

tection to high-side and low-side MOSFETs from con-

ducting simultaneously and shorting the input supply.

This is accomplished by ensuring the falling gate has

turned off one MOSFET before the other is allowed to

rise.

During turn-off the low-side MOSFET, the internal LGATE

voltage is monitored until it below 1.5V threshold, at which

time the UGATE is released to rise after a constant delay.

During turn-off the high-side MOSFET, the UGATE volt-

age is also monitored until it above 1.5V threshold, at

which time the LGATE is released to rise after a constant

delay.

Dropout Operation

As the input supply voltage decreases to a value ap-

proaching the output voltage, the duty cycle increases

toward the maximum on time. Further reduction of the

supply voltage forces the main switch to remain on for

more than one cycle until it reaches 100% duty cycle. The

output voltage will then be determined by the input volt-

age minus the voltage drop across the P-FET and the

inductor.

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