ZSC31010

Data Sheet

May 25, 2011

© 2011 Zentrum Mikroelektronik Dresden AG — Rev. 2.8

All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without

the prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.

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4.2.

Absolute Analog Voltage Output

The figure below shows an application circuit for an absolute voltage output configuration with temperature

compensation via internal temperature PTAT, and external JFET regulation for all industry standard applications.

Figure 4.2

Absolute Analog Voltage Output

2

1

5

6

7

8

3

4

ZSC31010

Bsink

VBP

N/C

VBN

VSS

VDD

Vgate

0.1 F

Ground

+5.5 to +30 V

OUT

Optional Bsink

SD

MMBF4392

The output signal range can be one of the following options:

mode via a 4-bit EEPROM field (see section 2.4.3).

the ratiometric output mode via a 4-bit EEPROM field (see section 2.4.3).