PIC18F4550ESOSQTP datasheet(183/438 Pages) MICROCHIP

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DS39632E-page 181

PIC18F2455/2550/4455/4550

17.5.1

USB INTERRUPT STATUS

The USB Interrupt Status register (Register 17-7) con-

tains the flag bits for each of the USB status interrupt

sources. Each of these sources has a corresponding

interrupt enable bit in the UIE register. All of the USB

status flags are ORed together to generate the USBIF

interrupt flag for the microcontroller’s interrupt funnel.

Once an interrupt bit has been set by the SIE, it must

be cleared by software by writing a ‘0’. The flag bits

can also be set in software which can aid in firmware

debugging.

When the USB module is in the Low-Power Suspend

mode (UCON<1> = 1), the SIE does not get clocked.

When in this state, the SIE cannot process packets,

and therefore, cannot detect new interrupt conditions

other than the Activity Detect Interrupt, ACTVIF. The

ACTVIF bit is typically used by USB firmware to detect

when the microcontroller should bring the USB module

out of the Low-Power Suspend mode (UCON<1> = 0).

UIR: USB INTERRUPT STATUS REGISTER

U-0

R/W-0

R-0

R/W-0

—

SOFIF

STALLIF

IDLEIF(1)

TRNIF(2)

ACTVIF(3)

UERRIF(4)

URSTIF

bit 7

bit 0

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

bit 7

Unimplemented: Read as ‘0’

bit 6

SOFIF: Start-Of-Frame Token Interrupt bit

1 = A Start-Of-Frame token received by the SIE

0 = No Start-Of-Frame token received by the SIE

bit 5

STALLIF: A STALL Handshake Interrupt bit

1 = A STALL handshake was sent by the SIE

0 = A STALL handshake has not been sent

bit 4

IDLEIF: Idle Detect Interrupt bit(1)

1 = Idle condition detected (constant Idle state of 3 ms or more)

0 = No Idle condition detected

bit 3

TRNIF: Transaction Complete Interrupt bit(2)

1 = Processing of pending transaction is complete; read USTAT register for endpoint information

0 = Processing of pending transaction is not complete or no transaction is pending

bit 2

ACTVIF: Bus Activity Detect Interrupt bit(3)

1 = Activity on the D+/D- lines was detected

0 = No activity detected on the D+/D- lines

bit 1

UERRIF: USB Error Condition Interrupt bit(4)

1 = An unmasked error condition has occurred

0 = No unmasked error condition has occurred.

bit 0

URSTIF: USB Reset Interrupt bit

1 = Valid USB Reset occurred; 00h is loaded into UADDR register

0 = No USB Reset has occurred

Note 1:

Once an Idle state is detected, the user may want to place the USB module in Suspend mode.

Clearing this bit will cause the USTAT FIFO to advance (valid only for IN, OUT and SETUP tokens).

This bit is typically unmasked only following the detection of a UIDLE interrupt event.

Only error conditions enabled through the UEIE register will set this bit. This bit is a status bit only and

cannot be set or cleared by the user.

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