Electronic Components Datasheet Search
  New Zealand  ▼
ALLDATASHEET.CO.NZ

X  

PIC10LF322T-EMCSQTP Datasheet(PDF) 102 Page - Microchip Technology

Part # PIC10LF322T-EMCSQTP
Description  6/8-Pin, High-Performance, Flash Microcontrollers
PDF  210 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

PIC10LF322T-EMCSQTP Datasheet(HTML) 102 Page - Microchip Technology

Back Button PIC10LF322T-EMCSQTP Datasheet HTML 98Page - Microchip Technology PIC10LF322T-EMCSQTP Datasheet HTML 99Page - Microchip Technology PIC10LF322T-EMCSQTP Datasheet HTML 100Page - Microchip Technology PIC10LF322T-EMCSQTP Datasheet HTML 101Page - Microchip Technology PIC10LF322T-EMCSQTP Datasheet HTML 102Page - Microchip Technology PIC10LF322T-EMCSQTP Datasheet HTML 103Page - Microchip Technology PIC10LF322T-EMCSQTP Datasheet HTML 104Page - Microchip Technology PIC10LF322T-EMCSQTP Datasheet HTML 105Page - Microchip Technology PIC10LF322T-EMCSQTP Datasheet HTML 106Page - Microchip Technology Next Button
Zoom Inzoom in Zoom Outzoom out
 102 / 210 page
background image
PIC10(L)F320/322
DS41585A-page 102
Preliminary
 2011 Microchip Technology Inc.
16.1.3
SOFTWARE PROGRAMMABLE
PRESCALER
A single software programmable prescaler is available
for use with Timer0. The prescaler assignment is
controlled by the PSA bit of the OPTION_REG register.
To assign the prescaler to Timer0, the PSA bit must be
cleared to a ‘0’.
There are 8 prescaler options for the Timer0 module
ranging from 1:2 to 1:256. The prescale values are
selectable via the PS<2:0> bits of the OPTION_REG
register.
The prescaler is not readable or writable. When
assigned to the Timer0 module, all instructions writing to
the TMR0 register will clear the prescaler.
16.1.4
TIMER0 INTERRUPT
Timer0 will generate an interrupt when the TMR0
register overflows from FFh to 00h. The TMR0IF
interrupt flag bit of the INTCON register is set every
time the TMR0 register overflows, regardless of
whether or not the Timer0 interrupt is enabled. The
TMR0IF bit can only be cleared in software. The Timer0
interrupt enable is the TMR0IE bit of the INTCON
register.
16.1.5
8-BIT COUNTER MODE
SYNCHRONIZATION
When in 8-Bit Counter mode, the incrementing edge on
the T0CKI pin must be synchronized to the instruction
clock. Synchronization can be accomplished by
sampling the prescaler output on the Q2 and Q4 cycles
of the instruction clock. The high and low periods of the
external clocking source must meet the timing
requirements as shown in Section 24.0 “Electrical
Specifications”
.
Note:
The Timer0 interrupt cannot wake the
processor from Sleep since the timer is
frozen during Sleep.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com