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PIC24HJ128GP310 Datasheet(PDF) 21 Page - Microchip Technology |
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PIC24HJ128GP310 Datasheet(HTML) 21 Page - Microchip Technology |
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21 / 286 page  © 2007 Microchip Technology Inc. DS70175F-page 19 PIC24HJXXXGPX06/X08/X10 bit 0 C: MCU ALU Carry/Borrow bit 1 = A carry-out from the Most Significant bit (MSb) of the result occurred 0 = No carry-out from the Most Significant bit of the result occurred REGISTER 2-1: SR: CPU STATUS REGISTER (CONTINUED) Note 1: The IPL<2:0> bits are concatenated with the IPL<3> bit (CORCON<3>) to form the CPU Interrupt Priority Level. The value in parentheses indicates the IPL if IPL<3> = 1. User interrupts are disabled when IPL<3> = 1. 2: The IPL<2:0> Status bits are read only when NSTDIS = 1 (INTCON1<15>). |
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