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PIC24HJ128GP310 Datasheet(PDF) 281 Page - Microchip Technology |
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PIC24HJ128GP310 Datasheet(HTML) 281 Page - Microchip Technology |
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281 / 286 page  © 2007 Microchip Technology Inc. DS70175F-page 279 PIC24HJXXXGPX06/X08/X10 Power-Saving Features .................................................... 129 Clock Frequency and Switching................................ 129 Program Address Space..................................................... 23 Construction................................................................ 49 Data Access from Program Memory Using Program Space Visibility..................................... 52 Data Access from Program Memory Using Table Instructions ......................................................... 51 Data Access from, Address Generation...................... 50 Memory Map ............................................................... 24 Table Read Instructions TBLRDH ............................................................. 51 TBLRDL .............................................................. 51 Visibility Operation ...................................................... 52 Program Memory Interrupt Vector ........................................................... 25 Organization................................................................ 25 Reset Vector ............................................................... 25 Pulse-Width Modulation Mode .......................................... 144 PWM Duty Cycle................................................................. 144 Period........................................................................ 144 R Reader Response ............................................................. 284 Registers ADxCHS0 (ADCx Input Channel 0 Select................. 213 ADxCHS123 (ADCx Input Channel 1, 2, 3 Select)............................................................ 212 ADxCON1 (ADCx Control 1)..................................... 207 ADxCON2 (ADCx Control 2)..................................... 209 ADxCON3 (ADCx Control 3)..................................... 210 ADxCON4 (ADCx Control 4)..................................... 211 ADxCSSH (ADCx Input Scan Select High)............... 214 ADxCSSL (ADCx Input Scan Select Low) ................ 214 ADxPCFGH (ADCx Port Configuration High) ........... 215 ADxPCFGL (ADCx Port Configuration Low)............. 215 CiBUFPNT1 (ECAN Filter 0-3 Buffer Pointer)........... 190 CiBUFPNT2 (ECAN Filter 4-7 Buffer Pointer)........... 191 CiBUFPNT3 (ECAN Filter 8-11 Buffer Pointer) ............................................................. 191 CiBUFPNT4 (ECAN Filter 12-15 Buffer Pointer) ............................................................. 192 CiCFG1 (ECAN Baud Rate Configuration 1) ............ 188 CiCFG2 (ECAN Baud Rate Configuration 2) ............ 189 CiCTRL1 (ECAN Control 1) ...................................... 180 CiCTRL2 (ECAN Control 2) ...................................... 181 CiEC (ECAN Transmit/Receive Error Count)............ 187 CiFCTRL (ECAN FIFO Control)................................ 183 CiFEN1 (ECAN Acceptance Filter Enable) ............... 190 CiFIFO (ECAN FIFO Status)..................................... 184 CiFMSKSEL1 (ECAN Filter 7-0 Mask Selection)...... 194 CiINTE (ECAN Interrupt Enable) .............................. 186 CiINTF (ECAN Interrupt Flag)................................... 185 CiRXFnEID (ECAN Acceptance Filter n Extended Identifier)........................................... 193 CiRXFnSID (ECAN Acceptance Filter n Standard Identifier) ........................................................... 193 CiRXFUL1 (ECAN Receive Buffer Full 1) ................. 196 CiRXFUL2 (ECAN Receive Buffer Full 2) ................. 196 CiRXMnEID (ECAN Acceptance Filter Mask n Extended Identifier)........................................... 195 CiRXMnSID (ECAN Acceptance Filter Mask n Standard Identifier) ........................................... 195 CiRXOVF1 (ECAN Receive Buffer Overflow 1) ........ 197 CiRXOVF2 (ECAN Receive Buffer Overflow 2) ........ 197 CiTRBnDLC (ECAN Buffer n Data Length Control)................................................. 200 CiTRBnEID (ECAN Buffer n Extended Identifier) .......................................................... 199 CiTRBnSID (ECAN Buffer n Standard Identifier)...... 199 CiTRBnSTAT (ECAN Receive Buffer n Status)........ 201 CiTRmnCON (ECAN TX/RX Buffer m Control) ........ 198 CiVEC (ECAN Interrupt Code) ................................. 182 CLKDIV (Clock Divisor) ............................................ 125 CORCON (Core Control)...................................... 20, 72 DMACS0 (DMA Controller Status 0) ........................ 117 DMACS1 (DMA Controller Status 1) ........................ 119 DMAxCNT (DMA Channel x Transfer Count)........... 116 DMAxCON (DMA Channel x Control)....................... 113 DMAxPAD (DMA Channel x Peripheral Address) .... 116 DMAxREQ (DMA Channel x IRQ Select) ................. 114 DMAxSTA (DMA Channel x RAM Start Address A)........................................................ 115 DMAxSTB (DMA Channel x RAM Start Address B)........................................................ 115 DSADR (Most Recent DMA RAM Address) ............. 120 I2CxCON (I2Cx Control)........................................... 159 I2CxMSK (I2Cx Slave Mode Address Mask)............ 163 I2CxSTAT (I2Cx Status) ........................................... 161 ICxCON (Input Capture x Control)............................ 142 IEC0 (Interrupt Enable Control 0) ............................... 83 IEC1 (Interrupt Enable Control 1) ............................... 85 IEC2 (Interrupt Enable Control 2) ............................... 87 IEC3 (Interrupt Enable Control 3) ............................... 89 IEC4 (Interrupt Enable Control 4) ............................... 90 IFS0 (Interrupt Flag Status 0) ..................................... 75 IFS1 (Interrupt Flag Status 1) ..................................... 77 IFS2 (Interrupt Flag Status 2) ..................................... 79 IFS3 (Interrupt Flag Status 3) ..................................... 81 IFS4 (Interrupt Flag Status 4) ..................................... 82 INTCON1 (Interrupt Control 1) ................................... 73 INTCON2 (Interrupt Control 2) ................................... 74 IPC0 (Interrupt Priority Control 0) ............................... 91 IPC1 (Interrupt Priority Control 1) ............................... 92 IPC10 (Interrupt Priority Control 10) ......................... 101 IPC11 (Interrupt Priority Control 11) ......................... 102 IPC12 (Interrupt Priority Control 12) ......................... 103 IPC13 (Interrupt Priority Control 13) ......................... 104 IPC14 (Interrupt Priority Control 14) ......................... 105 IPC15 (Interrupt Priority Control 15) ......................... 106 IPC16 (Interrupt Priority Control 16) ................. 107, 109 IPC17 (Interrupt Priority Control 17) ......................... 108 IPC2 (Interrupt Priority Control 2) ............................... 93 IPC3 (Interrupt Priority Control 3) ............................... 94 IPC4 (Interrupt Priority Control 4) ............................... 95 IPC5 (Interrupt Priority Control 5) ............................... 96 IPC6 (Interrupt Priority Control 6) ............................... 97 IPC7 (Interrupt Priority Control 7) ............................... 98 IPC8 (Interrupt Priority Control 8) ............................... 99 IPC9 (Interrupt Priority Control 9) ............................. 100 NVMCON (Flash Memory Control)............................. 55 OCxCON (Output Compare x Control) ..................... 146 OSCCON (Oscillator Control)................................... 124 OSCTUN (FRC Oscillator Tuning)............................ 127 PLLFBD (PLL Feedback Divisor) ............................. 126 RCON (Reset Control)................................................ 61 SPIxCON1 (SPIx Control 1) ..................................... 152 SPIxCON2 (SPIx Control 2) ..................................... 153 SPIxSTAT (SPIx Status and Control) ....................... 151 SR (CPU Status) .................................................. 18, 72 |
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