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PIC18F4550EMLQTP Datasheet(PDF) 18 Page - Microchip Technology |
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PIC18F4550EMLQTP Datasheet(HTML) 18 Page - Microchip Technology |
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18 / 430 page ![]() PIC18F2455/2550/4455/4550 DS39632D-page 16 Preliminary © 2007 Microchip Technology Inc. TABLE 1-3: PIC18F4455/4550 PINOUT I/O DESCRIPTIONS Pin Name Pin Number Pin Type Buffer Type Description PDIP QFN TQFP MCLR/VPP/RE3 MCLR VPP RE3 118 18 I P I ST ST Master Clear (input) or programming voltage (input). Master Clear (Reset) input. This pin is an active-low Reset to the device. Programming voltage input. Digital input. OSC1/CLKI OSC1 CLKI 13 32 30 I I Analog Analog Oscillator crystal or external clock input. Oscillator crystal input or external clock source input. External clock source input. Always associated with pin function OSC1. (See OSC2/CLKO pin.) OSC2/CLKO/RA6 OSC2 CLKO RA6 14 33 31 O O I/O — — TTL Oscillator crystal or clock output. Oscillator crystal output. Connects to crystal or resonator in Crystal Oscillator mode. In RC mode, OSC2 pin outputs CLKO which has 1/4 the frequency of OSC1 and denotes the instruction cycle rate. General purpose I/O pin. Legend: TTL = TTL compatible input CMOS = CMOS compatible input or output ST = Schmitt Trigger input with CMOS levels I = Input O = Output P = Power Note 1: Alternate assignment for CCP2 when CCP2MX Configuration bit is cleared. 2: Default assignment for CCP2 when CCP2MX Configuration bit is set. 3: These pins are No Connect unless the ICPRT Configuration bit is set. For NC/ICPORTS, the pin is No Connect unless ICPRT is set and the DEBUG Configuration bit is cleared. |
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