PIC24FJ128GA310 datasheet(208/406 Pages) MICROCHIP

208 / 406 page

PIC24FJ128GA310 FAMILY

DS39996F-page 208

 2010-2011 Microchip Technology Inc.

ICxCON2: INPUT CAPTURE x CONTROL REGISTER 2

U-0

R/W-0

—

—IC32

bit 15

bit 8

R/W-0

R/W-0 HS

U-0

R/W-0

R/W-1

R/W-0

R/W-1

ICTRIG

TRIGSTAT

—

SYNCSEL4

SYNCSEL3

SYNCSEL2

SYNCSEL1

SYNCSEL0

bit 7

bit 0

Legend:

HS = Hardware Settable bit

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

bit 15-9

Unimplemented:

Read as ‘0’

bit 8

IC32:

Cascade Two IC Modules Enable bit (32-bit operation)

= ICx and ICy operate in cascade as a 32-bit module (this bit must be set in both modules)

= ICx functions independently as a 16-bit module

bit 7

ICTRIG:

ICx Sync/Trigger Select bit

= Trigger ICx from the source designated by the SYNCSELx bits

= Synchronize ICx with the source designated by the SYNCSELx bits

bit 6

TRIGSTAT:

Timer Trigger Status bit

= Timer source has been triggered and is running (set in hardware, can be set in software)

= Timer source has not been triggered and is being held clear

bit 5

Unimplemented:

Read as ‘0’

Note 1:

Use these inputs as trigger sources only and never as sync sources.

Never use an IC module as its own trigger source, by selecting this mode.

PIC24FJ128GA310 Datasheet(PDF) 208 Page - Microchip Technology

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