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PIC24FJ128GA310 Datasheet(PDF) 223 Page - Microchip Technology

Part # PIC24FJ128GA310
Description  64/80/100-Pin, General Purpose, 16-Bit Flash Microcontrollers with LCD Controller and nanoWatt XLP Technology
PDF  406 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

PIC24FJ128GA310 Datasheet(HTML) 223 Page - Microchip Technology

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 2010-2011 Microchip Technology Inc.
DS39996F-page 223
PIC24FJ128GA310 FAMILY
To set up the SPI module for the Enhanced Buffer
Master mode of operation:
1.
If using interrupts:
a)
Clear the SPIxIF bit in the respective IFS
register.
b)
Set the SPIxIE bit in the respective IEC
register.
c)
Write the SPIxIP bits in the respective IPC
register.
2.
Write the desired settings to the SPIxCON1
and
SPIxCON2
registers
with
MSTEN
(SPIxCON1<5>) = 1.
3.
Clear the SPIROV bit (SPIxSTAT<6>).
4.
Select Enhanced Buffer mode by setting the
SPIBEN bit (SPIxCON2<0>).
5.
Enable SPI operation by setting the SPIEN bit
(SPIxSTAT<15>).
6.
Write the data to be transmitted to the SPIxBUF
register. Transmission (and reception) will start
as soon as data is written to the SPIxBUF
register.
To set up the SPI module for the Enhanced Buffer
Slave mode of operation:
1.
Clear the SPIxBUF register.
2.
If using interrupts:
a) Clear the SPIxIF bit in the respective IFS
register.
b) Set the SPIxIE bit in the respective IEC
register.
c)
Write the SPIxIP bits in the respective IPC
register to set the interrupt priority.
3.
Write the desired settings to the SPIxCON1
and
SPIxCON2
registers
with
MSTEN
(SPIxCON1<5>) = 0.
4.
Clear the SMP bit.
5.
If the CKE bit is set, then the SSEN bit must be
set, thus enabling the SSx pin.
6.
Clear the SPIROV bit (SPIxSTAT<6>).
7.
Select Enhanced Buffer mode by setting the
SPIBEN bit (SPIxCON2<0>).
8.
Enable SPI operation by setting the SPIEN bit
(SPIxSTAT<15>).
FIGURE 16-2:
SPIx MODULE BLOCK DIAGRAM (ENHANCED MODE)
Internal Data Bus
SDIx
SDOx
SSx/FSYNCx
SCKx
SPIxSR
bit 0
Shift Control
Edge
Select
FCY
Enable
Sync
Clock
Control
SPIXBUF
Control
Transfer
Transfer
Write SPIxBUF
Read SPIxBUF
16
SPIxCON1<1:0>
SPIxCON1<4:2>
Master Clock
8-Level FIFO
Receive Buffer
8-Level FIFO
Transmit Buffer
Primary
1:1/4/16/64
Prescaler
Secondary
Prescaler
1:1 to 1:8



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