PIC24FJ128GA310 datasheet(237/406 Pages) MICROCHIP

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DS39996F-page 237

PIC24FJ128GA310 FAMILY

bit 5

ACKDT:

Acknowledge Data bit (when operating as I2C master; applicable during master receive)

Value that will be transmitted when the software initiates an Acknowledge sequence.

= Sends NACK during Acknowledge

= Sends ACK during Acknowledge

bit 4

ACKEN:

Acknowledge Sequence Enable bit

(when operating as I2C master; applicable during master receive)

= Initiates Acknowledge sequence on SDAx and SCLx pins and transmits the ACKDT data bit.

Hardware is clear at the end of the master Acknowledge sequence.

= Acknowledge sequence is not in progress

bit 3

RCEN:

Receive Enable bit (when operating as I2C master)

= Enables Receive mode for I2C. Hardware is clear at the end of the eighth bit of the master receive

data byte.

= Receive sequence is not in progress

bit 2

PEN:

Stop Condition Enable bit (when operating as I2C master)

= Initiates Stop condition on the SDAx and SCLx pins. Hardware is clear at the end of the master

Stop sequence.

= Stop condition is not in progress

bit 1

RSEN:

Repeated Start Condition Enable bit (when operating as I2C master)

= Initiates Repeated Start condition on the SDAx and SCLx pins. Hardware is clear at the end of the

master Repeated Start sequence.

= Repeated Start condition is not in progress

bit 0

SEN:

Start Condition Enable bit (when operating as I2C master)

= Initiates Start condition on SDAx and SCLx pins. Hardware is clear at the end of the master Start

sequence.

= Start condition is not in progress

I2CxCON: I2Cx CONTROL REGISTER (CONTINUED)

PIC24FJ128GA310 Datasheet(PDF) 237 Page - Microchip Technology