PIC24FJ128GA310 datasheet(338/406 Pages) MICROCHIP

338 / 406 page

PIC24FJ128GA310 FAMILY

DS39996F-page 338

 2010-2011 Microchip Technology Inc.

CW3: FLASH CONFIGURATION WORD 3

U-1

—

bit 23

bit 16

R/PO-1

r-1

R/PO-1

WPEND

WPCFG

WPDIS

BOREN

WDTWIN1

WDTWIN0

SOSCSEL

bit 15

bit 8

R/PO-1

VBTBOR

WPFP6(3)

WPFP5

WPFP4

WPFP3

WPFP2

WPFP1

WPFP0

bit 7

bit 0

Legend:

PO = Program Once bit

r = Reserved bit

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

bit 23-16

Unimplemented:

Read as ‘1’

bit 15

WPEND:

Segment Write Protection End Page Select bit

= Protected code segment upper boundary is at the last page of program memory; the lower

boundary is the code page specified by WPFP<6:0>

= Protected code segment lower boundary is at the bottom of the program memory (000000h); upper

boundary is the code page specified by WPFP<6:0>

bit 14

WPCFG:

Configuration Word Code Page Write Protection Select bit

= Last page (at the top of program memory) and Flash Configuration Words are not write-protected(1)

= Last page and Flash Configuration Words are write-protected provided WPDIS = ‘0’

bit 13

WPDIS:

Segment Write Protection Disable bit

= Segmented code protection is disabled

= Segmented code protection is enabled; protected segment is defined by the WPEND, WPCFG and

WPFPx Configuration bits

bit 12

BOREN:

Brown-out Reset Enable bit

= BOR is enabled (all modes except Deep Sleep)

= BOR is disabled

bit 11-10

WDTWIN<1:0>:

Watchdog Timer Window Width Select bits

=25%

=37.5%

=50%

=75%

bit 9

Reserved:

Always maintain as ‘1’

bit 8

SOSCSEL:

SOSC Selection bit

= SOSC circuit is selected

= Digital (SCLKI) mode(2)

bit 7

VBTBOR:

VBAT BOR Enable bit

=VBAT BOR is enabled

=VBAT BOR is disabled

Note 1:

Regardless of WPCFG status, if WPEND = 1 or if WPFP corresponds to the Configuration Word page, the

Configuration Word page is protected.

Ensure that the SCLKI pin is made a digital input while using this configuration (see Table 11-1).

For the 62K devices: PIC24FJ64GA310, PIC24FJ64GA308 and PIC24FJ64GA306, bit 6 should be

maintained as ‘0’.

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