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LP61L256C Datasheet(PDF) 9 Page - AMIC Technology

Part # LP61L256C
Description  32K X 8 BIT HIGH SPEED CMOS SRAM
PDF  11 Pages
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Manufacturer  AMICC [AMIC Technology]
Direct Link  http://www.amictechnology.com
Logo AMICC - AMIC Technology

LP61L256C Datasheet(HTML) 9 Page - AMIC Technology

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LP61L256C Series
PRELIMINARY
(November, 2001, Version 0.0)
8
AMIC Technology, Inc.
AC Test Conditions
Input Pulse Levels
0V to 3.0V
Input Rise and Fall Time
2 ns
Input and Output Timing Reference Levels
1.5V
Output Load
See Figures 1 and 2
+3.3V
I/O
351
Ω
317
Ω
5pF*
* Including scope and jig.
ZO=50
Ω
OUTPUT
RL=50
Ω
VT=1.5V
Figure 1. Output Load
Figure 2. Output Load for tCLZ, tOLZ,
tCHZ, tOHZ, tWHZ, and tOW
Data Retention Characteristics (TA = 0
°C to 70°C)
Symbol
Parameter
Min.
Max.
Unit
Conditions
VDR
VCC for Data Retention
2
3.6
V
CE
≥ VCC - 0.2V
ICCDR
Data Retention Current
-
2
mA
VCC = 2.0V
CE
≥ VCC - 0.2V
VIN
≥ VCC - 0.2V or
VIN
≤ 0.2V
tCDR
Chip Disable to Data Retention
Time
0
-
ns
See Retention Waveform
tR
Operation Recovery Time
tRC*
-
ns
tRC = Read Cycle Time



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