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MFRC53001T/0FE Datasheet(PDF) 57 Page - NXP Semiconductors |
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MFRC53001T/0FE Datasheet(HTML) 57 Page - NXP Semiconductors |
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57 / 116 page ![]() MFRC530_33 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet PUBLIC Rev. 3.3 — 6 July 2010 057433 57 of 115 NXP Semiconductors MFRC530 ISO/IEC 14443 A Reader IC 10.5.3.5 CoderControl register Sets the clock rate and the coding mode. 10.5.3.6 ModWidth register Selects the pulse-modulation width. Table 75. CoderControl register (address: 14h) reset value: 0001 1001b, 19h bit allocation Bit 7 6 5 4 3 2 1 0 Symbol 00 CoderRate[2:0] 001 Access R/W R/W R/W Table 76. CoderControl register bit descriptions Bit Symbol Value Description 7 to 6 00 - these values must not be changed 6 0 - this value must not be changed 5 to 3 CoderRate[2:0] this register defines the clock rate for the encoder circuit 000 MIFARE 848 kBd 001 MIFARE 424 kBd 010 MIFARE 212 kBd 011 MIFARE 106 kBd; ISO/IEC 14443 A 100 reserved 101 reserved 110 reserved 111 reserved 2 to 0 001 - these values must not be changed Table 77. ModWidth register (address: 15h) reset value: 0001 0011b, 13h bit allocation Bit 7 6 5 4 3 2 1 0 Symbol ModWidth[7:0] Access R/W Table 78. ModWidth register bit descriptions Bit Symbol Description 7 to 0 ModWidth[7:0] defines the width of the modulation pulse based on tmod =2⋅(ModWidth + 1) / fclk |
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