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CMLDM5757 Datasheet(PDF) 2 Page - Central Semiconductor Corp |
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CMLDM5757 Datasheet(HTML) 2 Page - Central Semiconductor Corp |
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2 / 3 page ![]() CMLDM5757 SURFACE MOUNT SILICON DUAL P-CHANNEL ENHANCEMENT-MODE MOSFET SOT-563 CASE - MECHANICAL OUTLINE PIN CONFIGURATION LEAD CODE: 1) Source Q1 2) Gate Q1 3) Drain Q2 4) Source Q2 5) Gate Q2 6) Drain Q1 MARKING CODE: 77C ELECTRICAL CHARACTERISTICS PER TRANSISTOR - Continued: (TA=25°C) SYMBOL TEST CONDITIONS TYP MAX UNITS Qg(tot) VDS=10V, VGS=4.5V, ID=200mA 1.2 nC Qgs VDS=10V, VGS=4.5V, ID=200mA 0.24 nC Qgd VDS=10V, VGS=4.5V, ID=200mA 0.36 nC ton VDD=10V, VGS=4.5V, ID=215mA, RG=10Ω 38 ns toff VDD=10V, VGS=4.5V, ID=215mA, RG=10Ω 48 ns www.centr a lsemi.com R2 (5-June 2013) |
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