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DSPIC33FJ64GP706 Datasheet(PDF) 288 Page - Microchip Technology |
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DSPIC33FJ64GP706 Datasheet(HTML) 288 Page - Microchip Technology |
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288 / 322 page  dsPIC33FJXXXGPX06/X08/X10 DS70286C-page 286 © 2009 Microchip Technology Inc. TABLE 25-34: DCI MODULE (MULTI-CHANNEL, I2S MODES) TIMING REQUIREMENTS AC CHARACTERISTICS Standard Operating Conditions: 3.0V to 3.6V (unless otherwise stated) Operating temperature -40°C ≤ TA ≤ +85°C for Industrial Param No. Symbol Characteristic(1) Min Typ(2) Max Units Conditions CS10 TCSCKL CSCK Input Low Time (CSCK pin is an input) TCY/2 + 20 — — ns — CSCK Output Low Time(3) (CSCK pin is an output) 30 — — ns — CS11 TCSCKH CSCK Input High Time (CSCK pin is an input) TCY/2 + 20 — — ns — CSCK Output High Time(3) (CSCK pin is an output) 30 — — ns — CS20 TCSCKF CSCK Output Fall Time(4) (CSCK pin is an output) —10 25 ns — CS21 TCSCKR CSCK Output Rise Time(4) (CSCK pin is an output) —10 25 ns — CS30 TCSDOF CSDO Data Output Fall Time(4) —10 25 ns — CS31 TCSDOR CSDO Data Output Rise Time(4) —10 25 ns — CS35 TDV Clock Edge to CSDO Data Valid — — 10 ns — CS36 TDIV Clock Edge to CSDO Tri-Stated 10 — 20 ns — CS40 TCSDI Setup Time of CSDI Data Input to CSCK Edge (CSCK pin is input or output) 20 — — ns — CS41 THCSDI Hold Time of CSDI Data Input to CSCK Edge (CSCK pin is input or output) 20 — — ns — CS50 TCOFSF COFS Fall Time (COFS pin is output) —10 25 ns See Note 1 CS51 TCOFSR COFS Rise Time (COFS pin is output) —10 25 ns See Note 1 CS55 TSCOFS Setup Time of COFS Data Input to CSCK Edge (COFS pin is input) 20 — — ns — CS56 THCOFS Hold Time of COFS Data Input to CSCK Edge (COFS pin is input) 20 — — ns — Note 1: These parameters are characterized but not tested in manufacturing. 2: Data in “Typ” column is at 3.3V, 25°C unless otherwise stated. Parameters are for design guidance only and are not tested. 3: The minimum clock period for CSCK is 100 ns. Therefore, the clock generated in Master mode must not violate this specification. 4: Assumes 50 pF load on all DCI pins. |
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