PIC18F242 datasheet(205/332 Pages) MICROCHIP

205 / 332 page

DS39564C-page 203

PIC18FXX2

19.2

Watchdog Timer (WDT)

The Watchdog Timer is a free running on-chip RC oscil-

lator, which does not require any external components.

This RC oscillator is separate from the RC oscillator of

the OSC1/CLKI pin. That means that the WDT will run,

even if the clock on the OSC1/CLKI and OSC2/CLKO/

RA6 pins of the device has been stopped, for example,

by execution of a SLEEP instruction.

During normal operation, a WDT time-out generates a

device RESET (Watchdog Timer Reset). If the device is

in SLEEP mode, a WDT time-out causes the device to

wake-up and continue with normal operation (Watch-

dog Timer Wake-up). The TO bit in the RCON register

will be cleared upon a WDT time-out.

The Watchdog Timer is enabled/disabled by a device

configuration bit. If the WDT is enabled, software exe-

cution may not disable this function. When the WDTEN

configuration bit is cleared, the SWDTEN bit enables/

disables the operation of the WDT.

The WDT time-out period values may be found in the

Electrical Specifications (Section 22.0) under parame-

ter D031. Values for the WDT postscaler may be

assigned using the configuration bits.

19.2.1

CONTROL REGISTER

readable and writable register, which contains a control

bit that allows software to override the WDT enable

configuration bit, only when the configuration bit has

disabled the WDT.

Note:

The CLRWDT and SLEEP instructions clear

the WDT and the postscaler, if assigned to

the WDT and prevent it from timing out and

generating a device RESET condition.

Note:

When a CLRWDT instruction is executed

and the postscaler is assigned to the WDT,

the postscaler count will be cleared, but the

postscaler assignment is not changed.

U-0

R/W-0

—

—SWDTEN

bit 7

bit 0

bit 7-1

Unimplemented: Read as ’0’

bit 0

SWDTEN: Software Controlled Watchdog Timer Enable bit

= Watchdog Timer is on

= Watchdog Timer is turned off if the WDTEN configuration bit in the configuration

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

- n = Value at POR

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