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PIC18F242 Datasheet(PDF) 273 Page - Microchip Technology |
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PIC18F242 Datasheet(HTML) 273 Page - Microchip Technology |
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273 / 332 page  © 2006 Microchip Technology Inc. DS39564C-page 271 PIC18FXX2 22.3.3 TIMING DIAGRAMS AND SPECIFICATIONS FIGURE 22-5: EXTERNAL CLOCK TIMING (ALL MODES EXCEPT PLL) TABLE 22-4: EXTERNAL CLOCK TIMING REQUIREMENTS OSC1 CLKO Q4 Q1 Q2 Q3 Q4 Q1 1 2 3 3 4 4 Param. No. Symbol Characteristic Min Max Units Conditions 1A FOSC External CLKI Frequency(1) DC 40 MHz EC, ECIO, -40 °C to +85°C Oscillator Frequency(1) DC 25 MHz EC, ECIO, +85 °C to +125°C DC 4 MHz RC osc 0.1 4 MHz XT osc 4 25 MHz HS osc 4 10 MHz HS + PLL osc, -40 °C to +85°C 4 6.25 MHz HS + PLL osc, +85 °C to +125°C 5 200 kHz LP Osc mode 1 TOSC External CLKI Period(1) 25 — ns EC, ECIO, -40 °C to +85°C Oscillator Period(1) 40 — ns EC, ECIO, +85 °C to +125°C 250 — ns RC osc 250 10,000 ns XT osc 40 250 ns HS osc 100 250 ns HS + PLL osc, -40 °C to +85°C 160 250 ns HS + PLL osc, +85 °C to +125°C 25 — μsLP osc 2 TCY Instruction Cycle Time(1) 100 — ns TCY = 4/FOSC, -40 °C to +85°C 160 — ns TCY = 4/FOSC, +85 °C to +125°C 3 TosL, TosH External Clock in (OSC1) High or Low Time 30 — ns XT osc 2.5 — μsLP osc 10 — ns HS osc 4TosR, TosF External Clock in (OSC1) Rise or Fall Time — 20 ns XT osc — 50 ns LP osc —7.5 ns HS osc Note 1: Instruction cycle period (TCY) equals four times the input oscillator time-base period for all configurations except PLL. All specified values are based on characterization data for that particular oscillator type under standard operating conditions with the device executing code. Exceeding these specified limits may result in an unstable oscillator operation and/or higher than expected current consumption. All devices are tested to operate at “min.” values with an external clock applied to the OSC1/CLKI pin. When an external clock input is used, the “max.” cycle time limit is “DC” (no clock) for all devices. |
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