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AT24CS128-10PI Datasheet(PDF) 5 Page - ATMEL Corporation |
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AT24CS128-10PI Datasheet(HTML) 5 Page - ATMEL Corporation |
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5 / 12 page ![]() AT24CS128/256 5 Bus Timing (SCL: Serial Clock, SDA: Serial Data I/O) Write Cycle Timing (SCL: Serial Clock, SDA: Serial Data I/O) Note: 1. The write cycle time t WR is the time from a valid stop condition of a write sequence to the end of the internal clear/write cycle. SCL SDA STOP CONDITION START CONDITION ACK t WR (1) 8th BIT WORD n |
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