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AT89C55 Datasheet(PDF) 13 Page - ATMEL Corporation |
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AT89C55 Datasheet(HTML) 13 Page - ATMEL Corporation |
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13 / 24 page ![]() AT89C55 4-181 Power Down Mode In the power down mode, the oscillator is stopped, and the instruction that invokes power down is the last instruction executed. The on-chip RAM and Special Function Regis- ters retain their values until the power down mode is termi- nated. The only exit from power down is a hardware reset. Reset redefines the SFRs but does not change the on-chip RAM. The reset should not be activated before VCC is restored to its normal operating level and must be held active long enough to allow the oscillator to restart and sta- bilize. Program Memory Lock Bits The AT89C55 has three lock bits that can be left unpro- grammed (U) or can be programmed (P) to obtain the addi- tional features listed in the following table. When lock bit 1 is programmed, the logic level at the EA pin is sampled and latched during reset. If the device is pow- ered up without a reset, the latch initializes to a random value and holds that value until reset is activated. The latched value of EA must agree with the current logic level at that pin in order for the device to function properly. Lock Bit Protection Modes Programming the Flash The AT89C55 is normally shipped with the on-chip Flash memory array in the erased state (that is, contents = FFH) and ready to be programmed. The programming interface accepts either a high-voltage (12-volt) or a low-voltage (VCC) program enable signal. The low voltage programming mode provides a convenient way to program the AT89C55 inside the user’s system, while the high-voltage program- ming mode is compatible with conventional third party Flash or EPROM programmers. The AT89C55 is shipped with either the high-voltage or low-voltage programming mode enabled. The respective top-side marking and device signature codes are listed in following table. The AT89C55 code memory array is programmed byte-by- byte in either programming mode. To program any non- blank byte in the on-chip Flash Memory, the entire memory must be erased using the Chip Erase Mode. Programming Algorithm: Before programming the AT89C55, the address, data and control signals should be set up according to the Flash programming mode table and Figures 9 and 10. To program the AT89C55, take the fol- lowing steps: 1. Input the desired memory location on the address lines. 2. Input the appropriate data byte on the data lines. 3. Activate the correct combination of control signals. 4. Raise EA/VPP to 12V for the high-voltage programming mode. 5. Pulse ALE/PROG once to program a byte in the Flash array or the lock bits. The byte-write cycle is self-timed and typically takes no more than 1.5 ms. Repeat steps 1 through 5, changing the address and data for the entire array or until the end of the object file is reached. Program Lock Bits LB1 LB2 LB3 Protection Type 1 U U U No program lock features. 2P U U MOVC instructions executed from external program memory are disabled from fetching code bytes from internal memory, EA is sampled and latched on reset, and further programming of the Flash memory is disabled. 3 P P U Same as mode 2, but verify is also disabled. 4 P P P Same as mode 3, but external execution is also disabled. VPP = 12V VPP = 5V Top-Side Mark AT89C55 AT89C55 xxxx xxxx-5 yyww yyww Signature (030H) = 1EH (030H) = 1EH (031H) = 55H (031H) = 55H (032H) = FFH (032H) = 05H |
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