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ATF1504AS Datasheet(PDF) 13 Page - ATMEL Corporation |
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ATF1504AS Datasheet(HTML) 13 Page - ATMEL Corporation |
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13 / 21 page ![]() ATF1504ASZ 13 load data into the update registers. Control signals are gen- erated internally by the JTAG TAP controller. The BSC configuration for the input and I/O pins and macrocells are shown below. BSC Configuration for Input and I/O Pins (except JTAG TAP Pins) Note: The ATF1504AS has pull-up option on TMS and TDI pins. This feature is selected as a design option. BSC Configuration for Macrocell 0 1 DQ 0 1 0 1 DQ DQ Capture DR Capture DR Update DR 0 1 0 1 DQ DQ TDI TDI OUTJ OEJ Shift Shift Clock Clock Mode TDO TDO Pin BSC Macrocell BSC Pin Pin |
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