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A3PN010 Datasheet(PDF) 21 Page - Microsemi Corporation

Part # A3PN010
Description  ProASIC3 nano Flash FPGAs
PDF  114 Pages
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Manufacturer  MICROSEMI [Microsemi Corporation]
Direct Link  http://www.microsemi.com
Logo MICROSEMI - Microsemi Corporation

A3PN010 Datasheet(HTML) 21 Page - Microsemi Corporation

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ProASIC3 nano Flash FPGAs
Revision 11
2-7
Table 2-9 • Summary of I/O Output Buffer Power (per pin) – Default I/O Software Settings1
CLOAD (pF) 2
VCCI (V)
Dynamic Power, PAC10 (µW/MHz)3
Single-Ended
3.3 V LVTTL / 3.3 V LVCMOS
10
3.3
162.01
3.3 V LVCMOS wide range4
10
3.3
162.01
2.5 V LVCMOS
10
2.5
91.96
1.8 V LVCMOS
10
1.8
46.95
1.5 V LVCMOS (JESD8-11)
10
1.5
32.22
Notes:
1. Dynamic power consumption is given for standard load and software default drive strength and output
slew.
2. Values for A3PN020, A3PN015, and A3PN010. A3PN060, A3PN125, and A3PN250 correspond to a
default loading of 35 pF.
3. PAC10 is the total dynamic power measured on VCCI.
4. All LVCMOS3.3 V software macros support LVCMOS 3.3 V wide range as specified in the JESD8-B
specification.



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