KL16P64M48SF4 datasheet(21/55 Pages) FREESCALE

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Table 15. Device clock specifications (continued)

Symbol

Description

Min.

Max.

Unit

fosc_hi_2

Oscillator crystal or resonator frequency — high frequency

mode (high range) (MCG_C2[RANGE]=1x)

—

MHz

fTPM

TPM asynchronous clock

—

MHz

fUART0

UART0 asynchronous clock

—

MHz

1. The frequency limitations in VLPR and VLPS modes here override any frequency specification listed in the timing

specification for any other module. These same frequency limits apply to VLPS, whether VLPS was entered from RUN or

from VLPR.

2. The LPTMR can be clocked at this speed in VLPR or VLPS only when the source is an external pin.

5.3.2 General switching specifications

These general-purpose specifications apply to all signals configured for GPIO and UART

signals.

Table 16. General switching specifications

Description

Min.

Max.

Unit

Notes

GPIO pin interrupt pulse width (digital glitch filter disabled) —

Synchronous path

1.5

—

Bus clock

cycles

External RESET and NMI pin interrupt pulse width —

Asynchronous path

100

—

GPIO pin interrupt pulse width — Asynchronous path

—

Port rise and fall time

—

1. The greater synchronous and asynchronous timing must be met.

2. This is the shortest pulse that is guaranteed to be recognized.

3. 75 pF load

5.4 Thermal specifications

5.4.1 Thermal operating requirements

Table 17. Thermal operating requirements

Symbol

Description

Min.

Max.

Unit

Die junction temperature

–40

125

°C

Ambient temperature

–40

105

°C

General

KL16 Sub-Family Data Sheet Data Sheet, Rev. 2, 10/2013.

Freescale Semiconductor, Inc.

KL16P64M48SF4 Datasheet(PDF) 21 Page - Freescale Semiconductor, Inc

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