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LTC6946 Datasheet(PDF) 21 Page - Linear Technology |
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LTC6946 Datasheet(HTML) 21 Page - Linear Technology |
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21 / 30 page ![]() LTC6946 21 6946fa APPLICATIONS INFORMATION INTRODUCTION A PLL is a complex feedback system that may conceptually be considered a frequency multiplier. The system multiplies the frequency input at REF± and outputs a higher frequency at RF±. The PFD, charge pump, N divider, and external VCO and loop filter form a feedback loop to accurately control the output frequency (see Figure 14). The R and O divider are used to set the output frequency resolution. Using the above equations, the output frequency resolu- tion fSTEP produced by a unit change in N is given by Equation 6: fSTEP = fREF R• O (6) LOOP FILTER DESIGN A stable PLL system requires care in selecting the external loop filter values. The Linear Technology PLLWizard ap- plication, available from www.linear.com, aids in design and simulation of the complete system. The loop design should use the following algorithm: 1. Determine the output frequency, fRF, and frequency step size, fSTEP, based on application requirements. Using Equations 3, 4, 5 and 6, change fREF, N, R, and O until the application frequency constraints are met. Use the minimum R value that still satisfies the constraints. Then calculate B using Equation 1 and Table 7. 2. Select the open-loop bandwidth, BW, constrained by fPFD. A stable loop requires that BW is less than fPFD by at least a factor of 10. 3. Select loop filter component RZ and charge pump cur- rent ICP based on BW and the VCO gain factor, KVCO. BW (in Hz) is approximated by the following equation: BW ≅ ICP •RZ •KVCO 2• π •N (7) or RZ = 2• π •BW •N ICP •KVCO where KVCO is in Hz/V, ICP is in Amps, and RZ is in Ohms. KVCO is obtained from the VCO tuning sensitivity in the Electrical Characteristics. Use ICP = 11.2mA to lower in- band noise unless component values force a lower setting. R_DIV N_DIV ÷R ÷N O_DIV ÷O fPFD LTC6946 REF± (fREF) fVCO KPFD KVCO 25 RF± (fRF) 15 CP RZ CI CP LOOP FILTER LF(s) 6946 F14 TUNE ICP Figure 14. PLL Loop Diagram OUTPUT FREQUENCY When the loop is locked, the frequency fVCO (in Hz) produced at the output of the VCO is determined by the reference frequency, fREF, and the R and N divider values, given by Equation 3: fVCO = fREF •N R (3) Here, the PFD frequency fPFD produced is given by the following equation: fPFD = fREF R (4) and fVCO may be alternatively expressed as: fVCO = fPFD • N The output frequency fRF produced at the output of the O divider is given by Equation 5: fRF = fVCO O (5) |
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