Electronic Components Datasheet Search
  New Zealand  ▼
ALLDATASHEET.CO.NZ

X  

JS28F128P30T85A Datasheet(PDF) 57 Page - Numonyx B.V

Part # JS28F128P30T85A
Description  Numonyx??StrataFlash짰 Embedded Memory (P30)
PDF  97 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  NUMONYX [Numonyx B.V]
Direct Link  http://www.numonyx.com
Logo NUMONYX - Numonyx B.V

JS28F128P30T85A Datasheet(HTML) 57 Page - Numonyx B.V

Back Button JS28F128P30T85A Datasheet HTML 53Page - Numonyx B.V JS28F128P30T85A Datasheet HTML 54Page - Numonyx B.V JS28F128P30T85A Datasheet HTML 55Page - Numonyx B.V JS28F128P30T85A Datasheet HTML 56Page - Numonyx B.V JS28F128P30T85A Datasheet HTML 57Page - Numonyx B.V JS28F128P30T85A Datasheet HTML 58Page - Numonyx B.V JS28F128P30T85A Datasheet HTML 59Page - Numonyx B.V JS28F128P30T85A Datasheet HTML 60Page - Numonyx B.V JS28F128P30T85A Datasheet HTML 61Page - Numonyx B.V Next Button
Zoom Inzoom in Zoom Outzoom out
 57 / 97 page
background image
August 2008
Datasheet
Order Number: 306666-12
57
P30
R108
tAPA
Page address access
-
25
ns
1
R111
tphvh
RST# high to ADV# high
30
-
ns
Clock Specifications
R200
fCLK
CLK frequency
-52
MHz
1,3,5,6
TSOP
-
40
MHz
R201
tCLK
CLK period
19.2
-
ns
TSOP
25
-
ns
R202
tCH/CL
CLK high/low time
5
-
ns
R203
tFCLK/RCLK
CLK fall/rise time
-
3
ns
Synchronous Specifications(5,6)
R301
tAVCH/L
Address setup to CLK
9
-
ns
1
R302
tVLCH/L
ADV# low setup to CLK
9
-
ns
R303
tELCH/L
CE# low setup to CLK
9
-
ns
R304
tCHQV / tCLQV
CLK to output valid
-
17
ns
R305
tCHQX
Output hold from CLK
3
-
ns
1,7
R306
tCHAX
Address hold from CLK
10
-
ns
1,4,7
R307
tCHTV
CLK to WAIT valid
-
17
ns
1,7
R311
tCHVL
CLK Valid to ADV# Setup
3
-
ns
1
R312
tCHTX
WAIT Hold from CLK
3
-
ns
1,7
Notes:
1.
See
Figure 18, “AC Input/Output Reference Waveform” on page 55 for timing measurements and max
allowable input slew rate.
2.
OE# may be delayed by up to tELQV – tGLQV after CE#’s falling edge without impact to tELQV.
3.
Sampled, not 100% tested.
4.
Address hold in synchronous burst mode is tCHAX or tVHAX, whichever timing specification is satisfied first.
5.
Please see the latest P30 Spec Update for synchronous burst operation with the TSOP package.
6.
Synchronous read mode is not supported with TTL level inputs.
7.
Applies only to subsequent synchronous reads.
Table 31: AC Read Specifications for 256/512-Mbit Densities (Sheet 1 of 3)
Num
Symbol
Parameter
Speed
Min
Max
Unit
Notes
Asynchronous Specifications
R1
tAVAV
Read cycle time
VCC = 1.8 V – 2.0
V
85
-
ns
VCC = 1.7 V – 2.0
V
88
-
256/512-Mb TSOP
packages
95
R2
tAVQV
Address to output valid
VCC = 1.8 V – 2.0
V
-85
ns
VCC = 1.7 V – 2.0
V
-88
256/512-Mb TSOP
packages
-95
Table 30: AC Read Specifications for 64/128- Mbit Densities (Sheet 2 of 2)
Num
Symbol
Parameter
Min
Max
Unit
Notes



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com