L6226PDTR datasheet(17/31 Pages) STMICROELECTRONICS

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L6226

Application information

Doc ID 9452 Rev 4

17/31

Application information

A typical application using L6226 is shown in Figure 14. Typical component values for the

application are shown in Figure 8. A high quality ceramic capacitor in the range of 100 to

200 nF should be placed between the power pins (VSA and VSB) and ground near the

L6226 to improve the high frequency filtering on the power supply and reduce high

frequency transients generated by the switching. The capacitors connected from the

ENA/OCDA and ENB/OCDB nodes to ground set the shut down time for the Bridge A and

Bridge B respectively when an over current is detected (see overcurrent protection). The two

current sources (SENSEA and SENSEB) should be connected to power ground with a trace

length as short as possible in the layout. To increase noise immunity, unused logic pins are

best connected to 5 V (high logic level) or GND (low logic level) (see pin description).

It is recommended to keep power ground and signal ground separated on PCB.

Figure 14.

Typical application

Table 8.

Component values for typical application

100uF

1N4148

100nF

1N4148

CBOOT

220nF

RCLA

10nF

RCLB

CENA

5.6nF

RENA

100k

CENB

5.6nF

RENB

100k

CREF

68nF

L6226PDTR Datasheet(PDF) 17 Page - STMicroelectronics