DAC8562

REV. A

–5–

OPERATION

The DAC8562 is a complete ready to use 12-bit digital-to-

analog converter. Only one +5 V power supply is necessary for

operation. It contains a voltage-switched, 12-bit, laser-trimmed

digital-to-analog converter, a curvature-corrected bandgap refer-

ence, a rail-to-rail output op amp, and a DAC register. The par-

allel data interface consists of 12 data bits, DB0–DB11, and a

active low CE strobe. In addition, an asynchronous CLR pin

come zero volts. This function is useful for power on reset or

system failure recovery to a known state.

D/A CONVERTER SECTION

The internal DAC is a 12-bit voltage-mode device with an out-

put that swings from AGND potential to the 2.5 volt internal

bandgap voltage. It uses a laser trimmed R-2R ladder which is

switched by N channel MOSFETs. The output voltage of the

DAC has a constant resistance independent of digital input

code. The DAC output (not available to the user) is internally

connected to the rail-to-rail output op amp.

AMPLIFIER SECTION

The internal DAC’s output is buffered by a low power con-

sumption precision amplifier. This low power amplifier contains

a differential PNP pair input stage which provides low offset

voltage and low noise, as well as the ability to amplify the zero-

scale DAC output voltages. The rail-to-rail amplifier is config-

ured in a gain of 1.6384 (= 4.095 V/2.5 V) in order to set the

4.095 volt full-scale output (1 mV/LSB). See Figure 3 for an

equivalent circuit schematic of the analog section.

R1

R2

RAIL-TO-RAIL

OUTPUT

AMPLIFIER

R

BANDGAP

REFERENCE

REFOUT

2.5V

2R

R

2R

2R

2R

SPDT

N ch FET

SWITCHES

2R

AV = 4.096/2.5

= 1.636V/V

VOLTAGE SWITCHED 12-BIT

R-2R D/A CONVERTER

BUFFER

Figure 3. Equivalent DAC8562 Schematic of

Analog Portion

The op amp has a 16

µs typical settling time to 0.01%. There

are slight differences in settling time for negative slewing signals

versus positive. See the oscilloscope photos in the Typical Per-

formances section of this data sheet.

OUTPUT SECTION

The rail-to-rail output stage of this amplifier has been designed

to provide precision performance while operating near either

power supply. Figure 4 shows an equivalent output schematic of

the rail-to-rail amplifier with its N channel pull down FETs that

will pull an output load directly to GND. The output sourcing

current is provided by a P channel pull-up device that can sup-

ply GND terminated loads, especially important at the –5%

supply tolerance value of 4.75 volts.

AGND

N-CH

P-CH

Figure 4. Equivalent Analog Output Circuit

Figures 5 and 6 in the typical performance characteristics sec-

tion provide information on output swing performance near

ground and full scale as a function of load. In addition to resis-

tive load driving capability, the amplifier has also been carefully

designed and characterized for up to 500 pF capacitive load

driving capability.

REFERENCE SECTION

The internal 2.5 V curvature-corrected bandgap voltage refer-

ence is laser trimmed for both initial accuracy and low tempera-

ture coefficient. The voltage generated by the reference is

available at the REFOUT pin. Since REFOUT is not intended

to drive external loads, it must be buffered–refer to the applica-

tions section for more information. The equivalent emitter fol-

lower output circuit of the REFOUT pin is shown in Figure 3.

Bypassing the REFOUT pin is not required for proper opera-

tion. Figure 7 shows broadband noise performance.

POWER SUPPLY

The very low power consumption of the DAC8562 is a direct

result of a circuit design optimizing use of the CBCMOS pro-

cess. By using the low power characteristics of the CMOS for

the logic, and the low noise, tight matching of the complemen-

tary bipolar transistors, good analog accuracy is achieved.

For power-consumption sensitive applications it is important to

note that the internal power consumption of the DAC8562 is

strongly dependent on the actual logic-input voltage-levels

present on the DB0–DB11, CE and CLR pins. Since these in-

puts are standard CMOS logic structures, they contribute static

tal DAC8562 supply current as a function of the actual value of

input logic voltage. Consequently for optimum dissipation use

of CMOS logic versus TTL provides minimal dissipation in the

lowest standby dissipation of 600

µA with a +5 V power supply.