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PCI2250PCM Datasheet(PDF) 13 Page - Texas Instruments |
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PCI2250PCM Datasheet(HTML) 13 Page - Texas Instruments |
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13 / 16 page ![]() 5–1 5 Functional Considerations 5.1 External Arbiter The PCI2250 allows an external arbiter to be used in place of the default internal arbiter. This function is controlled by the S_CFN terminal. In order to use an external arbiter with the PCI2250, terminal 63 must be pulled up with a 10-k Ω resistor or hardwired to 3.3 V. If an external arbiter is not going to be used (the PCI2250 internal arbiter is used instead), then terminal 63 must be hardwired to GND. When an external secondary bus arbiter is used, the PCI2250 internally reconfigures the S_REQ0 and S_GNT0 signals, so that S_REQ0 becomes the secondary bus master grant for the bridge and the S_GNT0 becomes the secondary bus master request for the PCI2250. This is done because S_REQ0 is an input that can be used to provide the grant input to the bridge, and S_GNT0 is an output that can provide the request output from the bridge. VCC S_CFN PCI2250 S_GNT0 S_REQ0 External Arbiter REQ GNT Figure 5–1. External Arbiter When an external arbiter is used, all unused secondary bus grant outputs (S_GNT3–S_GNT1) are in a high-impedance state. Any unused secondary bus request lines (S_REQ3–S_REQ1) should be pulled high or hardwired to 3.3 V, to prevent the inputs from oscillating. 5.2 PCI Interrupts and IDSEL Mapping The PCI2250 can support up to four devices on the secondary side. Each device IDSEL should be connected to a secondary address line (S_AD[31:16]). In order to reduce capacitive load on the secondary address line, the connection can be made through a 1-k Ω series resistor. Because the PCI2250 is a bridge device, all parallel PCI interrupts on the secondary interface must be routed as sideband signals to the PCI interrupts on the primary interface. When using multiple devices behind the PCI2250, a device ID and how the PCI interrupts are routed should be very important considerations in a design. Some operating systems like Windows 95 expect a device PCI interrupt to be routed to a specific interrupt on the motherboard based on its ID number. For example, if a device ID is 4 and its PCI INTA is routed to PCI INTB on the motherboard, Windows 95 does not configure the device properly. In order to reduce any chance of incompatibilities, TI suggests the designer implement the interrupt routing scheme outlined in section 2.2.6 of the PCI Local Bus Specification Revision 2.2. Table 6–1 summarizes section 2.2.6. Windows 95 is a trademark of Microsoft Corporation. |
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