STCD22-0 datasheet(10/39 Pages) STMICROELECTRONICS

10 / 39 page

Device overview

STCD22x0, STCD23x0, STCD24x0

10/39

Doc ID 15400 Rev 2

Table 2.

Pin functions (STCD22x0, 2-channel)

number

name

Description

VCC

Supply voltage (decouple with a 1 µF capacitor to GND)

VTCXO LDO output for external clock source (decouple with a 1 µF capacitor to GND)

MCLK

Master clock input

OPT2

Optional pin 2. Connect to VCC or GND on PC board to field configure EN2

active high/low. Refer to

Section 3.2: Enable polarity for detailed information.

BYP

Bypass capacitor input pin (10 nF capacitor should be connected to GND in

order to improve thermal noise performance)

GND

Supply ground

MCREQ Master clock request signal (open drain, active low)

OPT1

Optional pin 1. Connect to VCC or GND on PC board to field configure EN1

active high/low. Refer to

Section 3.2: Enable polarity for detailed information.

CLK1

Clock output channel - output 1

EN1

Clock output channel enable-1 (active high/low OPT1 field programmable)

EN2

Clock output channel enable-2 (active high/low OPT2 field programmable)

CLK2

Clock output channel - output 2

Table 3.

Pin functions (STCD23x0, 3-channel)

number

name

Description

VCC

Supply voltage (decouple with a 1 µF capacitor to GND)

VTCXO LDO output for external clock source (decouple with a 1 µF capacitor to GND)

MCLK

Master clock input

EN3

Clock output channel enable-3 (active high/low factory laser programmable)

BYP

Bypass capacitor input pin (10 nF capacitor should be connected to GND in

order to improve thermal noise performance)

GND

Supply ground

MCREQ Master clock request signal (open drain, active low)

CLK3

Clock output channel - output 3

CLK1

Clock output channel - output 1

EN1

Clock output channel enable-1 (active high/low factory laser programmable)

EN2

Clock output channel enable-2 (active high/low factory laser programmable)

CLK2

Clock output channel - output 2

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