Radiometrix Ltd

HMT2 Data Sheet

page 3

User Interface

Pin description

Pin

Name

Function

1a

Vcc

5v regulated power supply (high current feed)

2a

0V

Ground

3a

0V

Ground

4a

0V

Ground

5a

RF input

50Ω RF input from the antenna

6a

0V

Ground

1b

P0/PGM

Channel select LSB / Serial programming (inverted logic level rs232)

2b

P1

Channel select

3b

P2

Channel select

4b

P3

Channel select MSB

5b

Vcc

5v input (low current feed)

6b

TXE

Transmitter enable. Low = ON, open = off. 100K pullup to Vcc

7b

0V

Ground

8b

TXD

Notes:

1.

Serial programming is by an inverted, cmos logic level, 2400 baud RS232 datastream applied to the

P0 pin.

2.

Channel select inputs have pullups (50K) to 4v internal rail. Do not exceed 4v logic levels on this

port.

3.

Channel select inputs are active low

4.

TXE has a 100K pullup to Vcc

5.

All pins are on an 0.1" grid

6.

Pin 1a supplies the power amplifer. This pin requires a clean, well regulated 5v supply at up to

300mA

Pin 5b supplies the remainder of the module. It can tolerate 4.1-9v and draws up to 100mA

7.

A version of the design is available with an LDO regulator in the PA feed.

In this case pin 1a can be supplied from a 6-9v rail too

8.

Pinout is compatible with FPX3, SHX1 and UHX1 transceivers, although the case is narrower and

the pins associated with receive functionality are absent.

Figure 3: HMT2 Footprint (Top) view through can