2 ms/DIV

MODE/F

1V/Div

DIM

1V/Div

LEDOFF

5V/Div

ILED

100 mA/Ddiv

LM3431

www.ti.com

SNVS547F – NOVEMBER 2007 – REVISED MARCH 2009

Figure 22. Analog Dimming Mode Waveforms

cycle. The average LED current tracks the dimming ratio with exceptional linearity. However, the accuracy of

average LED current depends somewhat on the rise and fall times of the external current regulators. This

becomes more apparent with short on-times. To ensure good linearity, select NPN regulators with short and

similar rise and fall times.

Setting FF

To minimize voltage transients during LED dimming, the output voltage is regulated via the AFB pin during LED

off times. However, because the control loop has a limited response time, voltage transients can never be

completely eliminated. If these transients are large enough, LED current will be affected and ceramic output

capacitors may generate audible noise. The FF pin speeds up the loop response time, and thus minimizes output

voltage transients during dimming.

A resistor connected from FF to ground, Rff, sets the FF current which is injected into the control loop at the

rising and falling edge of the dimming signal. In this way, the FF pin creates a correction signal before the control

loop can respond. A smaller FF resistor will generate a larger correction signal. The minimum recommended Rff

value is 10k.

Since the amount of FF correction required for a given application depends on many factors, it is best to

determine a FF resistor value through bench testing. Use the following procedure to determine an optimal Rff

value:

An Rff value of approximately 20k is a good starting point. A 20 k

Ω potentiometer in series with a 10 kΩ resistor

works well for bench testing.

The dimming frequency must be selected before setting Rff. Confirm that boost switching operation is stable at

100% dimming duty cycle.

Adjust Rff until the COMP pin voltage is between 0.8V and 0.9V. Next, monitor the cathode voltage response at

a low dimming duty cycle while adjusting Rff until the overshoot and undershoot is minimal or there is a slight

overshoot.

Check the cathode voltage response at the lowest input voltage and lowest dimming duty cycle and adjust Rff if

necessary. This is typically the worst case condition.

The curves in Figure 23 below show the variation in cathode voltage with different Rff settings. Notice that at the

ideal setting, both the cathode voltage and COMP voltage are flat. For clarity, the 3 cathode voltage curves in

this figure have been offset; all FF settings will result in the cathode voltage settling at 1.2V typically.

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