MB86604LPFV datasheet(34/56 Pages) FUJITSU

34 / 56 page

MB86604L

(b) Output timing (initiator

→ target)

*1: The position number indicates the position in the waveform.

*2: “S” value is based on the asychronous set up time setting register (address 17h).

Note: The output timing definitions are not applied when the data register is EMPTY in the data phase.

Parameter

Symbol

Value

Unit

Base signal

Position*1

Min.

Max.

REQ “H” negate time

ACK “L”

tAKRQH

—

ACK “H” negate time

REQ “H”

tRQAKH

B—

REQ “L” assert time

ACK “H”

tAKRQL

C10

—

Time from output data valid to ACK “L” assert

—tDBAK

S • tCLK – 10

—ns

Output data hold time

REQ “H”

thDB

E2 tCLK

—ns

ACK “L” assert time

REQ “L”

tRQAK1

F—

Valid data

DB7 to DB0

DBP

REQ

ACK

Valid data

t RQAK2

t RQAK1

t AKRQL

t RQAKH

t AKRQH

t DBAK

t hDB

t DBAK

*: The REQ “H”

→ ACK “L” time (tRQAK2) is defined by either longer of (tRQAKH + tAKRQL + tRQAK1) or (thDB +

tDBAK) (see the output timing waveform).

MB86604LPFV Datasheet(PDF) 34 Page - fujitsu semiconductor

MB86604LPFV Datasheet(HTML) 34 Page - fujitsu semiconductor

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56

Datasheet Download

Link URL