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TSB41AB1PHP Datasheet(PDF) 36 Page - Texas Instruments

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Part # TSB41AB1PHP
Description  IEEE 1394a-2000 ONE-PORT CABLE TRANSCEIVER/ARBITER
PDF  71 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

TSB41AB1PHP Datasheet(HTML) 36 Page - Texas Instruments

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TSB41AB1
IEEE 1394a2000 ONEPORT CABLE
TRANSCEIVER/ARBITER
SLLS423I − JUNE 2000 − REVISED MARCH 2005
36
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
POST OFFICE BOX 1443
• HOUSTON, TEXAS 77251−1443
APPLICATION INFORMATION
internal register configuration (continued)
Table 4. Page 0 (Port Status) Register Field Descriptions
FIELD
SIZE
TYPE
DESCRIPTION
Astat
2
Rd
TPA line state. This field indicates the TPA line state of the selected port, encoded as follows:
Code
Line State
00
invalid
01
1
10
0
11
Z
Bstat
2
Rd
TPB line state. This field indicates the TPB line state of the selected port. This field has the same encoding
as the Astat field.
Ch
1
Rd
Child/parent status. A 1 indicates that the selected port is a child port. A 0 indicates that the selected port
is the parent port. A disconnected, disabled, or suspended port is reported as a child port. The Ch bit is
invalid after a bus reset until tree-ID has completed.
Con
1
Rd
Debounced port connection status. This bit indicates that the selected port is connected. The connection
must be stable for the debounce time of approximately 341 ms for the con bit to be set to 1. The con bit is
reset to 0 by hardware reset and is unaffected by bus reset.
NOTE: The con bit indicates that the port is physically connected to a peer PHY, but the port is not
necessarily active.
Bias
1
Rd
Debounced incoming cable bias status. A 1 indicates that the selected port is detecting incoming cable bias.
The incoming cable bias must be stable for the debounce time of 52
µs for the bias bit to be set to 1.
Dis
1
Rd/Wr
Port disabled control. If 1, the selected port is disabled. The dis bit is reset to 0 by hardware reset (all ports
are enabled for normal operation following hardware reset). The dis bit is not affected by bus reset.
Peer_Speed
3
Rd
Port peer speed. This field indicates the highest speed capability of the peer PHY connected to the selected
port, encoded as follows:
Code
Peer Speed
000
S100
001
S200
010
S400
011–111
invalid
The Peer_Speed field is invalid after a bus reset until self-ID has completed.
NOTE: Peer speed codes higher than 010b (S400) are defined in IEEE 1394a-2000. However, the
TSB41AB1 is only capable of detecting peer speeds up to S400.
PIE
1
Rd/Wr
Port event interrupt enable. When set to 1, a port event on the selected port sets the port event interrupt (PEI)
bit and notifies the link. This bit is reset to 0 by hardware reset and is unaffected by bus reset.
Fault
1
Rd/Wr
Fault. This bit indicates that a resume-fault or suspend-fault has occurred on the selected port and that the
port is in the suspended state. A resume-fault occurs when a resuming port fails to detect incoming cable
bias from its attached peer. A suspend-fault occurs when a suspending port continues to detect incoming
cable bias from its attached peer. Writing 1 to this bit clears the bit to 0. This bit is reset to 0 by hardware
reset and is unaffected by bus reset.



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