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MB88347LP Datasheet(PDF) 4 Page - fujitsu semiconductor |
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MB88347LP Datasheet(HTML) 4 Page - fujitsu semiconductor |
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4 / 16 page  4 MB88347L s DATA CONFIGURATION The MB88347L has a 12-bit shift register for chip control. The 12-bit shift register must be used to set up data in the configuration shown below. The data configuration has a total of 12 bits, for address selection and eight for D/A data output. • D/A converter control signals Note: VLB = (VDD – VSS)/256 • Address selection signals D0 D1 D2 D3 D4 D5 D6 D7 D/A data output 00000000 ≅ VSS 10000000 ≅ VLB × 1 + VSS 01000000 ≅ VLB × 2 + VSS • • • • • • • • • • • • • • • • • • • • • • • • • • • 01111111 ≅ VLB × 254 + VSS 11111111 ≅ VLB × 255 + VSS D8 D9 D10 D11 Address selection 0000 Don’t Care 0001 AO1 Selection 0010 AO2 Selection 0011 AO3 Selection 0100 AO4 Selection 0101 AO5 Selection 0110 AO6 Selection 0111 AO7 Selection 1000 AO8 Selection 1001 Don’t Care 1010 Don’t Care 1011 Don’t Care 1100 Don’t Care 1101 Don’t Care 1110 Don’t Care 1111 Don’t Care Last LSB First MSB D/A output bits Address selection bits D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 |
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