Electronic Components Datasheet Search
  New Zealand  ▼
ALLDATASHEET.CO.NZ

X  

A43L4616A Datasheet(PDF) 2 Page - AMIC Technology

Part # A43L4616A
Description  4M X 16 Bit X 4 Banks Synchronous DRAM
PDF  43 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  AMICC [AMIC Technology]
Direct Link  http://www.amictechnology.com
Logo AMICC - AMIC Technology

A43L4616A Datasheet(HTML) 2 Page - AMIC Technology

  A43L4616A Datasheet HTML 1Page - AMIC Technology A43L4616A Datasheet HTML 2Page - AMIC Technology A43L4616A Datasheet HTML 3Page - AMIC Technology A43L4616A Datasheet HTML 4Page - AMIC Technology A43L4616A Datasheet HTML 5Page - AMIC Technology A43L4616A Datasheet HTML 6Page - AMIC Technology A43L4616A Datasheet HTML 7Page - AMIC Technology A43L4616A Datasheet HTML 8Page - AMIC Technology A43L4616A Datasheet HTML 9Page - AMIC Technology Next Button
Zoom Inzoom in Zoom Outzoom out
 2 / 43 page
background image
A43L4616A
4M X 16 Bit X 4 Banks Synchronous DRAM
Preliminary
PRELIMINARY
(May, 2010, Version 0.4)
1
AMIC Technology, Corp.
Features
JEDEC standard 3.3V power supply
LVTTL compatible with multiplexed address
Four banks / Pulse RAS
MRS cycle with address key programs
- CAS Latency (2,3)
- Burst Length (1,2,4,8, FP)
- Burst Type (Sequential & Interleave)
All inputs are sampled at the positive going edge of the
system clock
Clock Frequency: 166MHz @ CL=3, 100Mhz @ CL=2
143MHz @ CL=3, 100Mhz @ CL=2
133MHz @ CL=3, 100Mhz @ CL=2
Industrial temperature operation: -40
°C to +85°C for -U
Automotive temperature operation : -40
°C to +85°C for -A
Burst Read Single-bit Write operation
DQM for masking
Auto & self refresh
64ms refresh period (8K cycle)
54 Pin TSOP (II)
Lead-free product available
All Pb-free (lead-free) product are RoHS compliant
General Description
The A43L4616A is 268,435,456 bits synchronous high data
rate Dynamic RAM organized as 4 X 4,194,304 words by
16 bits, fabricated with AMIC’s high performance CMOS
technology. Synchronous design allows precise cycle
control with the use of system clock. I/O transactions are
possible on every clock cycle. Range of operating
frequencies, programmable latencies allows the same
device to be useful for a variety of high bandwidth, high
performance memory system applications.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com