PRELIMINARY



Pin Assignment

Pin Description

Leadless Grid Array Package

Thin Shrink Small Outline Package ™

Pin No.

HM6C5332

24-pin LGA

Package

Pin No.

HM6C5332

20-pin TSSOP

Package

PIN

NAME

I/O

Description

24

1

VDDRF

-

Power supply voltage input for RF analog and RF digital circuits. Input may

range from 2.7V to 3.6V. VDDRF must equal VDDIF. Bypass capacitors

should be placed as close as possible to this pin and be connected directly

to the ground plane.

2

2

VPPRF

-

Power Supply for RF charge pump. Must be

≥ VDDRF.

33

DoRF

O

Internal RF charge pump output. For connection to a loop filter for driving

the input of an external VCO.

4

4

VSRFD

-

Ground for RF digital circuitry.

5

5

finRF

I

RF prescaler input. Small signal input from the VCO.

66

VIRF

-

This pin is to provide a bypass capacitor to the internal voltage supply and

bypass capacitor must be placed between this pin and RF analog GND(Pin

7). With a slight performance degradation, this pin may be NC.

7

7

VSRFA

-

Ground for RF analog circuitry.

88

OSCin

I

Oscillator input. The input has a VDDRF/2 input threshold and can be

driven from an external CMOS or TTL logic gate.

10

9

VSS

-

Ground for data interface, FoLD, and oscillator circuits.

11

10

FoLD

O

Multiplexed output of the RF/IF programmable or reference dividers, and

RF/IF lock detect signals. CMOS output(See Programmable Modes)

12

11

Clock

I

High impedance CMOS Clock input. Data for the various counters is

clocked in on the rising edge, into the 22-bit shift register.

14

12

Data

I

Binary serial data input. Data entered MSB first. The last two bits are the

control bits. High impedance CMOS input.

15

13

LE

I

Load enable high impedance CMOS input. When LE goes HIGH, data

stored in the shift register is loaded into one of the 4 appropriate

latches(control bit dependent).