ATF280F_14 datasheet(41/107 Pages) ATMEL

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ATF280F [DATASHEET]

7750E

−AERO−05/12

Figure 5-12. ATF280F Power-On Reset in mode 7

Notes:

1. This line shows the different lifephase viewable in life cycle diagram described in OperatingModes /

Lifephases

section,

“CCE” means Clear Cycle End.

[Power-On-Reset]: During the Power-On Reset lifephase, the ATF280F starts to drive the signal regarding the

configuration download interfaces as defined below. The end of this lifephase is marked by the rising edge of

IO303_INIT pin:

• M0, M1, M2: these signals are inputs and not used,

• CCLK: this signal is internally pulled-up,

• IO713_D0: this signal is internally pulled-up,

• CON: this signal is driven to a low logic level,

• IO303_INIT: this signal is internally pulled-up until the end of the Clear Cycle operation (CCE). At this time,

IO303_INIT is driven to a low logic level during approximatively 1 us,

• IO259_LDC: the Low During Configuration is driven to a low logic level,

• IO265_HDC: the High During Configuration is driven to a high logic level,

• RESETN: this signal is an input which has no effect during the Power-On Reset lifephase.

[Mode Sampling]: During the Mode Sampling lifephase, the ATF280F continues to drive the signal regarding

configuration download interfaces. In addition, Mode Pins (M0, M1, M2) are sensed:

• M0, M1, M2: these signals are inputs and sensed to determine the used mode. If mode 0 is sampled (as

shown in the figure above), the automatic configuration download starts.

(1)

(2)

ATF280F Datasheet(PDF) 41 Page - ATMEL Corporation