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ICS9169AM-70 Datasheet(PDF) 4 Page - Integrated Circuit Systems |
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ICS9169AM-70 Datasheet(HTML) 4 Page - Integrated Circuit Systems |
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4 / 7 page ![]() 4 ICS9169A-70 Absolute Maximum Ratings Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . 7.0 V Logic Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . GND –0.5 V to VDD +0.5 V Ambient Operating Temperature . . . . . . . . . . . . 0°C to +70°C Storage Temperature . . . . . . . . . . . . . . . . . . . . . . –65°C to +150°C Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are stress specifications only and functional operation of the device at these or any other conditions above those listed in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product reliability. Electrical Characteristics - REF TA = 0 - 70C; VDD = VDDL = 3.3 V +/-10%; CL = 20 pF (unless otherwise stated) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Output High Voltage VOH1 IOH = -14 mA 2.4 2.9 V Output Low Voltage VOL1 IOL = 11 mA 0.3 0.4 V Output High Current IOH1 VOH = 2.0 V -43.0 23.0 mA Output Low Current IOL1 VOL = 0.8 V 20.0 31.0 mA Rise Time tr5 1 VOL = 0.8 V, VOH = 2.4 V 0.7 1.5 nS Fall Time tf5 1 VOH = 2.4 V, VOL = 0.8 V 0.6 1.5 nS Duty Cycle dt5 1 VT = 1.5 V 405360% Jitter tj1s5 1 VT = 1.5 V - 182 400 pS tjabs5 1 VT = 1.5 V -700 - 700 pS 1Guarenteed by design, not 100% tested in production. Electrical Characteristics - Input/Supply/Common Output Parameters TA = 0 - 70C; Supply Voltage VDD = 3.3 V +/-10% (unless otherwise stated) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Input High Voltage VIH 2.0 - - V Input Low Voltage VIL -- 0.9 V Input High Current IIH1 VIN = VDD -5 0.2 5 mA Input Low Current IIL1 VIN = 0 V -20 -50.0 - mA Supply Current IDD CL = 0 pF; Select @ 66M 50 110 mA Input frequency Fi VDD = 3.3 V; 14.318 MHz Input Capacitance 1 CIN Logic Inputs 5 pF CINX X1 & X2 pins 27.0 36.0 45.0 pF Transition Time 1 Ttrans To 1st crossing of target Freq. 0.136 2.0 mS Settling Time 1 Ts From 1st crossing to 1% target Freq. 63.0 600 µS Clock Overshoot 1 Tsh 1.7 4.0 MHz Clk Stabilization 1 TSTAB From VDD = 3.3 V to 1% target Freq. 3mS 1Guarenteed by design, not 100% tested in production. |
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