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ICS9250-19 Datasheet(PDF) 1 Page - Integrated Circuit Systems |
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ICS9250-19 Datasheet(HTML) 1 Page - Integrated Circuit Systems |
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1 / 15 page ![]() ICS9250-19 Third party brands and names are the property of their respective owners. Integrated Circuit Systems, Inc. Block Diagram Frequency Generator & Integrated Buffers for Celeron & PII/III™ 9250-19 Rev C 4/12/01 Functionality Pin Configuration Recommended Application: BX, Appollo Pro 133 type of chip set. Output Features: • 3 - CPUs @2.5V, up to 150MHz. • 17 - SDRAM @ 3.3V, up to 150MHz. • 7 - PCI @3.3V • 2 - IOAPIC @ 2.5V • 1 - 48MHz, @3.3V fixed. • 1 - 24MHz @ 3.3V • 2 - REF @3.3V, 14.318MHz. Features: • Up to 150MHz frequency support • Support power management: CPU, PCI, stop and Power down Mode form I 2C programming. • Spread spectrum for EMI control (0 to -0.5%, ± 0.25%). • Uses external 14.318MHz crystal Key Specifications: • CPU – CPU: <175ps • CPU – PCI: 1 - 4ns • PCI – PCI: <500ps • SDRAM - SDRAM: <250ps 56-Pin SSOP * Internal Pull-up Resistor of 240K to 3.3V on indicated inputs ** Internal Pull-down resistor of 240K to GND on indicated inputs. 3 S F2 S F1 S F0 S F U P C ) z H M ( ) z H M ( K L C I C P 1111 3 3 1) 4 / U P C ( 3 . 3 3 111 0 4 2 1) 4 / U P C ( 1 3 11 0 1 0 5 1) 4 / U P C ( 5 . 7 3 11 00 0 4 1) 4 / U P C ( 5 3 10 1 1 5 0 1) 3 / U P C ( 5 3 10 10 0 1 1) 3 / U P C ( 7 6 . 6 3 10 0 1 5 1 1) 3 / U P C ( 3 3 . 8 3 1 000 0 2 1) 3 / U P C ( 0 0 . 0 4 0 111 0 . 0 0 1) 3 / U P C ( 3 4 . 3 3 01 1 0 3 3 1) 3 / U P C ( 3 3 . 4 4 01 01 2 1 1) 3 / U P C ( 3 3 . 7 3 01 0 0 3 0 1) 2 / U P C ( 3 3 . 4 3 00 11 6 . 6 6) 2 / U P C ( 0 4 . 3 3 00 1 0 3 . 3 8) 2 / U P C ( 5 6 . 1 4 000 1 5 7) 2 / U P C ( 5 . 7 3 0000 4 2 1) 2 / U P C ( 3 3 . 1 4 ICS reserves the right to make changes in the device data identified in this publication without further notice. ICS advises its customers to obtain the latest version of all device data to verify that any information being relied upon by the customer is current and accurate. |
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