28F008SA-L datasheet(21/28 Pages) INTEL

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28F008SA-L

DC CHARACTERISTICS (Continued) VCC e 50V g10%

Symbol

Parameter

Notes

Min

Typ

Max

Unit

Test Condition

VPPH

VPP during EraseWrite

114

120

126

Operations

VLKO

VCC EraseWrite Lock

Voltage

NOTES

1 All currents are in RMS unless otherwise noted Typical values at VCC e 50V VPP e 120V T e 25 C These currents

are valid for all product versions (packages and speeds)

2 ICCES is specified with the device deselected If the 28F008SA-L is read while in Erase Suspend Mode current draw is

the sum of ICCES and ICCR

3 Includes RYBY

4 Block ErasesByte Writes are inhibited when VPP e VPPL and not guaranteed in the range between VPPH and VPPL

AC INPUTOUTPUT REFERENCE WAVEFORM

290435 – 7

AC test inputs are driven at 30V for a Logic ‘‘1’’ and 00V for a Logic ‘‘0’’ Input timing

begins and output timing ends at 15V Input rise and fall times (10% to 90%) k 10 ns

AC TESTING LOAD CIRCUIT(2)

CL e 50 pF

CL Includes Jig

290435 – 8

Capacitance

RL e 33 kX

AC CHARACTERISTICSRead-Only Operations(1) VCC e 33V g03V 50V g10%

Versions

28F008SA-150

Unit

Symbol

Parameter

Notes

Min

Max

tAVAV

tRC

Read Cycle Time

150

tAVQV

tACC

Address to Output Delay

150

tELQV

tCE

to Output Delay

150

tPHQV

tPWH

High to Output Delay

600

tGLQV

tOE

to Output Delay

tELQX

tLZ

to Output Low Z

tEHQZ

tHZ

High to Output High Z

tGLQX

tOLZ

to Output Low Z

tGHQZ

tDF

High to Output High Z

tOH

Output Hold from Addresses CE

or OE

Change Whichever is First

NOTES

1 See AC InputOutput Reference Waveform for timing measurements

2 OE

may be delayed up to tCE–tOE after the falling edge of CE

without impact on tCE

3 Sampled not 100% tested

28F008SA-L Datasheet(PDF) 21 Page - Intel Corporation

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