370

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

http://www.intersil.com or 407-727-9207

HCTS00MS

Radiation Hardened

Quad 2-Input NAND Gate

Pinouts

14 LEAD CERAMIC DUAL-IN-LINE

METAL SEAL PACKAGE (SBDIP)

MIL-STD-1835 CDIP2-T14

TOP VIEW

14 LEAD CERAMIC METAL SEAL FLATPACK PACKAGE

(FLATPACK) MIL-STD-1835 CDFP3-F14

TOP VIEW

Functional Diagram

TRUTH TABLE

INPUTS

OUTPUTS

An

Bn

Yn

LL

H

LH

H

HLH

HH

L

NOTE: L = Logic Level Low, H = Logic level High

A1

B1

Y1

A2

B2

Y2

GND

VCC

B4

A4

Y4

B3

A3

Y3

1

2

3

4

5

6

7

14

13

12

11

10

9

8

14

13

12

11

10

9

8

2

3

4

5

6

7

1

A1

B1

Y1

A2

B2

Y2

GND

VCC

B4

A4

Y4

B3

A3

Y3

(1, 4, 9, 12)

An

(2, 5, 10, 13)

Bn

Yn

(3, 6, 8, 11)

Features

• 3 Micron Radiation Hardened SOS CMOS

• Total Dose 200K RAD (Si)

(Typ)

• Latch-Up Free Under Any Conditions

• Significant Power Reduction Compared to LSTTL ICs

• DC Operating Voltage Range: 4.5V to 5.5V

• LSTTL Input Compatibility

- VIL = 0.8V Max

- VIH = VCC/2 Min

• CMOS Input Compatibility Ii

≤ 5µA at VOL, VOH

Description

The Intersil HCTS00MS is a Radiation Hardened Quad 2-Input

NAND Gate. A high on both inputs forces the output to a Low

state.

The HCTS00MS utilizes advanced CMOS/SOS technology to

achieve high-speed operation. This device is a member of radia-

tion hardened, high-speed, CMOS/SOS Logic Family.

The HCTS00MS is supplied in a 14 lead Ceramic flatpack

(K suffix) or a SBDIP Package (D suffix).

Ordering Information

PART

NUMBER

TEMPERATURE

RANGE

SCREENING

LEVEL

PACKAGE

HCTS00DMSR

Intersil Class

S Equivalent

14 Lead SBDIP

HCTS00KMSR

Intersil Class

S Equivalent

14 Lead Ceramic

Flatpack

HCTS00D/

Sample

Sample

14 Lead SBDIP

HCTS00K/

Sample

Sample

14 Lead Ceramic

Flatpack

HCTS00HMSR

Die

Die

August 1995

Spec Number

518774

File Number

2139.2