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HIP6017 Datasheet(PDF) 9 Page - Intersil Corporation |
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HIP6017 Datasheet(HTML) 9 Page - Intersil Corporation |
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9 / 14 page ![]() 2-218 For an equation for the output inductor ripple current see the section under component guidelines titled ‘Output Inductor Selection’. OUT1 Voltage Program The output voltage of the PWM converter is programmed to discrete levels between 1.8VDC and 3.5VDC. This output is designed to supply the microprocessor core voltage. The voltage identification (VID) pins program an internal voltage reference (DACOUT) through a TTL-compatible 5-bit digital-to-analog converter. The level of DACOUT also sets the PGOOD and OVP thresholds. Table 1 specifies the DACOUT voltage for the different combinations of connections on the VID pins. The VID pins can be left open for a logic 1 input, because they are internally pulled up to +5V by a 10 µA (typically) current source. Changing the VID inputs during operation is not recommended. The sudden change in the resulting reference voltage could toggle the PGOOD signal and exercise the over-voltage protection. All VID pin combinations resulting in an INHIBIT disable the IC and the open-collector at the PGOOD pin. Application Guidelines Soft-Start Interval Initially, the soft-start function clamps the error amplifier’s output of the PWM converter. After the output voltage increases to approximately 80% of the set value, the reference input of the error amplifier is clamped to a voltage proportional to the SS pin voltage. Both linear outputs follow a similar start-up sequence. The resulting output voltage sequence is shown in Figure 6. The soft-start function controls the output voltage rate of rise to limit the current surge at start-up. The soft-start interval is programmed by the soft-start capacitor, CSS. Programming a faster soft-start interval increases the peak surge current. The peak surge current occurs during the initial output voltage rise to 80% of the set value. Shutdown The PWM output does not switch until the soft-start voltage (VSS) exceeds the oscillator’s valley voltage. Additionally, the reference on each linear’s amplifier is clamped to the soft- start voltage. Holding the SS pin low with an open drain or collector signal turns off all three regulators. The VID codes resulting in an INHIBIT as shown in Table 1 also shuts down the IC. Layout Considerations MOSFETs switch very fast and efficiently. The speed with which the current transitions from one device to another causes voltage spikes across the interconnecting impedances and parasitic circuit elements. The voltage spikes can degrade efficiency, radiate noise into the circuit, and lead to device over-voltage stress. Careful component UGATE OCSET PHASE OVER- CURRENT1 + - GATE CONTROL VCC OC1 200 µA VDS iD VSET ROCSET VIN = +5V OVER-CURRENT TRIP: VDS > VSET (iD x rDS(ON) > IOCSET • ROCSET) IOCSET + + FIGURE 9. OVER-CURRENT DETECTION PWM VPHASE = VIN - VDS VOCSET = VIN - VSET DRIVE HIP6017 VCC LGATE PGND TABLE 1. VOUT1 VOLTAGE PROGRAM PIN NAME NOMINAL OUT1 VOLTAGE DACOUT VID4 VID3 VID2 VID1 VID0 0 1 X X X INHIBIT 0011 X INHIBIT 00101 1.80 00100 1.85 00011 1.90 00010 1.95 00001 2.00 00000 2.05 11111 INHIBIT 11110 2.1 11101 2.2 11100 2.3 11011 2.4 11010 2.5 11001 2.6 11000 2.7 10111 2.8 10110 2.9 10101 3.0 10100 3.1 10011 3.2 10010 3.3 10001 3.4 10000 3.5 NOTE: 0 = connected to GND or VSS, 1 = open or connected to 5V through pull-up resistors, X = don’t care HIP6017 |
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