HIP9021 datasheet(3/7 Pages) INTERSIL

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Absolute Maximum Ratings

Thermal Information

Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +16V

Input Voltage. . . . . . . . . . . . . . . . . . . . . . . GND -0.3V to VCC +0.3V

Maximum Current, IDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50mA

Maximum Transient Reverse Current, IR (10s). . . . . . . . . . . . -50mA

Operating Conditions

Typical Power Supply Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . 7.5V

Operating Voltage Range . . . . . . . . . . . . . . . . . . . . . . . +5V to +15V

Operating Temperature Range . . . . . . . . . . . . . . . . . -40oC to 150oC

Typical Oscillator Frequency. . . . . . . . . . . . . . . . . . . . . . . . . . . 5kHz

Thermal Resistance (Typical, Note 1)

JA (

oC/W)

SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

175

Maximum Storage Temperature Range . . . . . . . . . .-65oC to 150oC

Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . 150oC

Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300oC

(Lead Tips Only)

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation

of the device at these or any other conditions above those indicated in the operational sections of this speciﬁcation is not implied.

Electrical Speciﬁcations

VDD = 7.5V, Figure 1 Test Circuit, Table 1 Conditions, TA = +25

oC Unless Otherwise Speciﬁed

PARAMETER

SYMBOL

TEST CONDITIONS

MIN

TYP

MAX

UNITS

DC Supply Current

IDD

0.1

1.2

3.1

OSC Source Current

+IOSC

µA

OSC Sink Current

-IOSC

-32

-25

-19

µA

OSC Threshold Voltage

VOSC(TH)

4.75

4.95

5.25

OSC Trigger Voltage

VOSC(TR)

2.30

2.45

2.65

TRIGGER Input Leak Current

ITRIGGER

0.02

1.5

µA

TORQUE Input Leak Current

ITORQUE

0.02

1.5

µA

DELAY Current at 1V

IDELAY1

1.5

3.4

µA

DELAY Current at 2V

IDELAY2

132

DELAY Threshold Voltage

VDELAY(TH)

1.8

1.9

DRAIN Input Resistance

RDRAIN

150

260

350

Ω

DRAIN Current

IDRAIN

1.7

4.6

GATE Output Source Current

IGATE

GATE Output Voltage

VGATE

6.5

7.4

GATE Output Slew Rate

VGATE(S/R)

Measured in Typical Application Circuit,

Duty Cycle = 50%, See Figure 2

-10-

µs

DELAY Output Framed Pulse

Duty Cycle

FP/DC

Gate Duty Cycle = 50%;

VTORQUE = GND; VDRAIN = VGATE;

DELAY =10k

Ω to GND, Refer to Figure 1

for the Test circuit and Timing Diagram of

the DELAY Output Pulse Frame.

-44-

DELAY Output Framed Pulse De-

lay, VGATE to VDELAY

FP/DLY

-3-

Typical Oscillator Frequency

fOSC

TA = 25

kHz

TA = -40

7.2

kHz

TA = 85

3.6

kHz

NOTES:

θJA is measured with the component mounted on an evaluation PC board in free air.

HIP9021

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