AN4368 datasheet(5/18 Pages) STMICROELECTRONICS

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AN4368

Three-stage architecture for detecting motion

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Three-stage architecture for detecting motion

To detect motion, a three-stage architecture based on op-amps is used to condition the

signal of a PIR sensor. This architecture is explained below.

3.1

Stage 1

The first architectural stage amplifies the signal. It cancels the DC part of the signal and

filters the high frequency noise that could lead to false detections. The schematic of this

first architectural stage is shown in Figure 3.

Figure 3: Schematic of the first architectural stage

C = capacitor, D = diode, R = resistor, U = op-amp

Figure 3 shows that noise is filtered thanks to the components R1 and C1. The cut-off

frequency is 5 Hz (fhigh1 = 1/(2 x π x R1 x C1)). This application does not need to work at

higher frequencies because usually we are detecting human motion.

The second filter is used to reject the DC part of the signal. R2 and C2 perform a high pass

filter that has a cut-off frequency of 0.6 Hz (flow1 = 1/(2 x π x R2 x C2)).

Since we do not amplify the DC part of the signal, the Vio, which is the input offset voltage

of the op-amp, has no importance in this application.

The stage gain is 53.3 (Gain1 = 1 + R1/R2). This amplification allows a usable signal that is

higher than the noise level. The DC bias of the first architectural stage is determined by the

sensor. To avoid saturation, the gain must not be too big because amplification is made

around this common mode voltage (which is not Vcc/2).

STMicroelectronics’ TSU101 op-amp is a perfect fit for this architectural stage. As well as

having very low consumption, the TSU101 operates with a typical current consumption of

only 600 nA at Vcc = 3.3 V.

The diode, D1, is explained in Section 5: "Power-up".

AN4368 Datasheet(PDF) 5 Page - STMicroelectronics