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AN3105 Datasheet(PDF) 5 Page - STMicroelectronics |
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AN3105 Datasheet(HTML) 5 Page - STMicroelectronics |
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5 / 30 page ![]() AN3105 Main characteristics and circuit description Doc ID 16774 Rev 2 5/30 1.2 Resonant power stage The down-stream converter is a resonant LLC half-bridge stage working with 50 percent fixed duty cycle and variable frequency. It implements the ST L6599AT, integrating all functions necessary to properly control the resonant topology. The resonant transformer, manufactured by MAGNETICA, uses the integrated magnetic approach, so the leakage inductance is used for resonant operation of the circuit. Therefore, no external, additional coil is needed for the resonance. The transformer secondary winding configuration is the typical centre tap, using a couple of type STPS10150CG power Schottky rectifiers. The output capacitors are film type, 4.7 µF - 63 V from EPCOS. Like for the PFC stage, using film capacitors allows to increase considerably the MTBF of the board. A small LC filter has been added on the output, in order to filter the high frequency ripple. D21, D22, and R55 implement a voltage controlled bleeder; in the case of no-load operation of the SMPS, this circuit provides a bleeder limiting the increase of output voltage, but not affecting efficiency during normal operation. Please note that the converter has not been designed to work in this condition and therefore its mains consumption is not optimized (~3 W). 1.3 Startup sequence The PFC acts as master and therefore starts first; the resonant stage operates only if the PFC is delivering the nominal output voltage to prevent the resonant converter from working with a too low input voltage which can cause incorrect capacitive mode operation. Therefore both stages are designed to work according to this sequence. For correct sequencing, the L6599AT makes use of the LINE pin (#7) to sense the PFC output voltage via a resistor divider. The L6599AT LINE pin (#7) has an internal comparator which has a hysteresis allowing the turn-on and turn-off voltage to be set independently. At startup, the LLC stage starts once the PFC output voltage reaches ~ 430 V, while the turn- off threshold has been set to ~ 330 V. 1.4 Output voltage feedback loop The output voltage is kept stable by means of a feedback loop implementing a typical circuit using a TS2431 to modulate the current in the optocoupler diode. On the primary side, R43 - connecting pin RFMIN (#4) to the optocoupler's phototransistor - allows the L6599AT oscillator frequency to be modulated, therefore keeping the output voltage regulated. It also sets the maximum switching frequency at about 130 kHz. R42, which connects the same pin to ground, sets the minimum switching frequency. The R-C series R37 and C24 sets both soft-start maximum frequency and duration. All demonstration boards implement the voltage loop circuitry described above but in case a current loop is also required it can be achieved by implementing the following modifications: ● Replace R30 and R31 0R0 Ω resistors with sensing resistors, 0R033 and 0R039 respectively, both 0805 ● Populate on PCB U4 and the relevant components reported on the schematic as N.M.: C36 = 1N0-0805; C37 = 100NF-0805; R51 = 15R-0805; R56 = 1K0-0805; R61 =22K- 1206; C41 = 2N2-0805; U5 = SEA05TR ● Remove the TS2431AILT |
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