DocID027178 Rev 1

5/16

AN4623

JTAG Data Communication (JDC)

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1.3

JDC Module Registers

The JDC module has four 32-bit registers.

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Module Configuration Register (MCR): The MCR is used to enable the interrupt outputs

of the JDC. This register is reset by power-on reset, system destructive reset, and

system functional reset. The MCR register fields are:

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JIN_IEN: JIN Interrupt Enable. [1 asserts; 0 not assert]

–

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Module Status Register (MSR): The MSR holds the JTAG register status and interrupt

bits. This register is reset by power-on reset, system destructive reset, and system

functional reset. The MSR register fields are:

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JIN_RDY: JIN Ready (read only)

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1: Set when new data is written to the JIN_IPS register

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0: Cleared upon software read of JIN_IPS contents via IPS

•

–

1: Set when new data is written to the JIN_IPS register

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0: Cleared by writing logic 1

•

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1: Set when new data is written to the JOUT_IPS register

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0: Cleared upon tool read of JOUT register via JTAG port

•

JOUT_INT: JOUT Interrupt.

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1: Set when JOUT_RDY bit is cleared by tool reading JOUT register

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0: Cleared by writing logic 1

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JTAG Output IPS Data Register (JOUT_IPS): Contains JOUT_IPS data. The

JOUT_IPS register holds data written via IPS. The JOUT_IPS contents are ported out

and captured into the JOUT register to be read via the JTAG port. This register is reset

by power-on reset, system destructive reset, and system functional reset.

•

JTAG Input IPS Data Register (JIN_IPS): Contains JIN_IPS data. Data written to the

JTAG input data register (JIN) via the JTAG port is held in the JIN_IPS register, where it

can be read via IPS. This register is reset by power-on reset, system destructive reset,

and system functional reset.

1.4

JDC no memory mapped registers definition

The JDC also implements two JTAG accessible registers that are not memory mapped. One

JTAG register is used to shift in data to be placed in the JIN_IPS register. The other JTAG

register captures data from the JOUT_IPS register and ready status from the MSR to be

shifted out via the JTAG port.

•

JTAG output data register (JOUT): The JOUT register captures data from the

JOUT_IPS register upon execution of the JOUT_READ JTAG instruction. It also holds

the JIN_RDY and JOUT_RDY status bits. This register is reset by system destructive

reset and JTAG reset.