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UM0239 Datasheet(PDF) 18 Page - STMicroelectronics |
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UM0239 Datasheet(HTML) 18 Page - STMicroelectronics |
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18 / 44 page ![]() Getting started UM0239 18/44 4.2.8 Frequency detection time This parameter (Bits [10:9]) defines the time within which a carrier must be detected across the Mains before signalling it on ST7540 CD/PD pin. If the Preamble Detection method is selected, the CD/PD becomes active only if also a preamble is detected. For more information, see Section 4.2.7: Detection method. 4.2.9 Output voltage freeze The Output Voltage Freeze parameter (Bit 17) turns off the Voltage Control Loop once the ALC remains in a steady condition for about 3 control loop periods and maintains a stable condition until the end of transmission. This function is available only if the Extended Control Register parameter (Bit 21) is enabled. 4.2.10 Output clock The Output Clock parameter (Bits [16:15]) sets the ST7540 MCLK line frequency as a sub- multiple of the 16-MHz oscillator frequency or disables the output clock. 4.2.11 Header recognition The Header Recognition parameter (Bit 18) enables the hardware recognition of one or more headers (one 16-bit header or two 8-bit headers depending on the Header Length parameter setting). Header recognition is signaled by the CD/PD line in different ways depending on Frame Length Count (bit 19). Note: If synchronization software is used, this parameter must be disabled to ensure the correct behavior of RX sessions. This function is available only if the Extended Control Register parameter (Bit 21) is enabled. Table 11. Frequency detection time Bits [10:9] Value (msec) Bits [10:9] Value (msec) 00 0.5 10 3 01 1 (default) 11 5 Table 12. Output voltage freeze Bit 17 Value 0Enabled 1 Disabled (default) Table 13. Output clock Bits [16:15] Value (MHz) Bits [16:15] Value (MHz) 00 16 10 4 (default) 01 8 11 Clock OFF |
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