AN1707 datasheet(2/5 Pages) STMICROELECTRONICS

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AN1707

Introduction

2/5

Fig. 2: Description of the TD220/221

As shown in

Figure 1, the TD220/221 internal

blocks are:

l Source—Used in order to bias other blocks in

the circuit,

l UVLO—Under Voltage Lock Out,

l Vreg—Voltage Regulator at 3.3 V (for the

TD220) or at 5 V (for the TD221),

l Driver—Provides

the current in order to

drive an external MOS,

l TPR—Two Point Regulator,

l Clamp—Fixes the maximum Vcc at 22 V.

The UVLO block insures that Vcc is set such that

the TD220/221 functions correctly. Two boundary

voltages are internally fixed at 14.1 V (UVLOH)

and at 8.2 V (UVLOL). If the circuit is in the OFF

state, it will turn on when the UVLO voltage

reaches 14.1 V. This represents the minimum

value necessary to turn the circuit ON, and then

the Vcc power supply value stabilizes at 13 V.

When the circuit is in the ON state, maximum

UVLO voltage value that turns the circuit OFF is

8.2 V.

The role of the UVLO is both simple and

extremely important: it imposes the voltage range

for circuit ignition and blocking.

When the Vcc is at 13 V the Vreg block provides a

precise output voltage at 3.3 V (for the TD220) or

at 5 V (for the TD221) with accuracy of

±3% at

25°C and for Iout = 10 mA. This Vcc is used to

supply power to the driver of an external power

MOS.

The Vcc voltage is so exact thanks to the TPR

block that allows it to maintain an accuracy of

±300 mV. This variation is measured using the

external capacitor C1 = 100 nF as shown in

Figure 3 and Figure 4.

Fig. 3: TPR schematic: LDMOS Off

V 13V

Threshold Comparator High = 13.15V

Threshold Comparator Low = 12.85V

VCC

VCAP

VSUP

LDMOS

Isup

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