AN2836 datasheet(5/57 Pages) STMICROELECTRONICS

5 / 57 page

AN2836

List of figures

Doc ID 15084 Rev 1

5/57

List of figures

Figure 1.

L6225 block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Figure 2.

L6226 block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Figure 3.

L6227 block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Figure 4.

Supply voltage of high-side gate drivers versus supply voltage . . . . . . . . . . . . . . . . . . . . . 10

Figure 5.

Currents and voltages during the deadtime at a phase change . . . . . . . . . . . . . . . . . . . . . 11

Figure 6.

Voltage at the two outputs during the deadtime at a phase change . . . . . . . . . . . . . . . . . . 11

Figure 7.

Typical application and layout suggestions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Figure 8.

Two situations that must be avoided . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Figure 9.

Charge pump . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Figure 10.

Sharing the charge pump circuitry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Figure 11.

Obtaining a variable voltage through a PWM output of a µC . . . . . . . . . . . . . . . . . . . . . . . 18

Figure 12.

Logic input pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Figure 13.

ENA and ENB input pins. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Figure 14.

PWM current control circuitry (L6227 only). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Figure 15.

PWM output current regulation waveforms (L6227 only) . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Figure 16.

Typical off-time vs. COFF for several values of ROFF . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Figure 17.

Minimum on-time vs. COFF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Figure 18.

Slow decay mode output stage configurations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Figure 19.

PWM controller loses the current regulation due to minimum on-time (L6227 only) . . . . . 24

Figure 20.

PWM controller loses the current regulation due to minimum on-time (L6227 only) - detail24

Figure 21.

L6225 and L6227 overcurrent detection simplified circuitry . . . . . . . . . . . . . . . . . . . . . . . . 24

Figure 22.

L6226 overcurrent detection simplified circuitry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Figure 23.

Overcurrent operation: timing 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

Figure 24.

Overcurrent operation: timing 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

Figure 25.

Typical disable time vs. CEN for several values of REN . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

Figure 26.

Typical delay time vs. CEN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

Figure 27.

Output current detection threshold versus RCL value (L6226 only) . . . . . . . . . . . . . . . . . . 28

Figure 28.

Adjusting the OCD threshold through an external reference voltage (L6226 only). . . . . . . 28

Figure 29.

VS and SENSE pins maximum sourced current handling. . . . . . . . . . . . . . . . . . . . . . . . . . 29

Figure 30.

VS and SENSE pins maximum sinked current handling . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

Figure 31.

L6225 parallel connection with lower overcurrent threshold . . . . . . . . . . . . . . . . . . . . . . . 30

Figure 32.

L6226 parallel connection with lower overcurrent threshold . . . . . . . . . . . . . . . . . . . . . . . 31

Figure 33.

L6227 parallel connection with lower overcurrent threshold . . . . . . . . . . . . . . . . . . . . . . . 31

Figure 34.

L6225 parallel connection for higher current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

Figure 35.

L6226 parallel connection for higher current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

Figure 36.

L6225 paralleling the four half bridges . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

Figure 37.

L6226 paralleling the four half bridges . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

Figure 38.

IC dissipated power versus output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

Figure 39.

Maximum output current vs. selectable devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

Figure 40.

Power dissipation and thermal analysis with PractiSPINTM software . . . . . . . . . . . . . . . . . 36

Figure 41.

Application example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

Figure 42.

PractiSPINTM PC software . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

Figure 43.

PractiSPINTM ST7 demonstration board. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

Figure 44.

EVAL6225PD board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42

Figure 45.

EVAL6225PD electrical schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43

Figure 46.

EVAL6225PD component placement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44

Figure 47.

EVAL6225PD top layer layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44

Figure 48.

EVAL6225PD bottom layer layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44

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